Keep the input switching current
loop as small as possible.
Keep the SW node as physically
small and short as possible to minimize parasitic capacitance and inductance and
to minimize radiated emissions. Kelvin connections must be brought from the
output to the feedback pin of the device.
Keep analog and non-switching
components away from switching components.
Make a single point connection
from the signal ground to power ground.
Do not allow switching current to
flow under the device.
Keep the pattern lines for VIN
and PGND broad.
Exposed pad of device must be
connected to PGND with solder.
VREG5 capacitor must be placed
near the device and connected PGND.
Output capacitor must be
connected to a broad pattern of the PGND.
Voltage feedback loop must be as
short as possible, and preferably with ground shield.
Lower resistor of the voltage
divider, which is connected to the VFB pin must be tied to SGND.
Providing sufficient via is
preferable for VIN, SW, and PGND connection.
PCB pattern for VIN, SW, and PGND
must be as broad as possible.
If VIN and VCC is shorted, VIN
and VCC patterns need to be connected with broad pattern lines.
Place the VIN
capacitor as close as possible to the device.