SLVSAT1A June   2011  – July 2022 TPS54325-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start and Pre-Biased Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Output Discharge Control
      4. 7.3.4 Current Protection
      5. 7.3.5 Overvoltage and Undervoltage Protection
      6. 7.3.6 UVLO Protection
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Operation
      2. 7.4.2 PWM Frequency and Adaptive On-Time Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Bootstrap Capacitor Selection
        6. 8.2.2.6 VREG5 Capacitor Selection
        7. 8.2.2.7 Output Voltage Resistors Selection
      3. 8.2.3 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Information
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
IVCC Operating – nonswitching supply current VCC current, TA = 25°C, EN = 5 V, VFB = 0.8 V 850 1300 μA
ICCSDN Shutdown supply current VCC current, TA = 25°C, EN = 0 V 10 μA
LOGIC THRESHOLD
VENH EN high-level input voltage EN 2 V
VENL EN low-level input voltage EN 0.4 V
VFB VOLTAGE AND DISCHARGE RESISTANCE
VFBTH VFB threshold voltage TA = 25°C, VO = 1.05 V 757 765 775 mV
TA = 0°C to 105°C, VO = 1.05 V 753 777
TA = –40°C to 105°C, VO = 1.05 V 750 780
IVFB VFB input current VFB = 0.8 V, TA = 25°C 0 ±0.1 μA
RDischg VO discharge resistance EN = 0 V, VO = 0.5 V, TA = 25°C 50 100 Ω
VREG5 OUTPUT
VVREG5 VREG5 output voltage TA = 25°C, 6.0 V < VCC < 18 V, 0 < IVREG5 < 5 mA 5.3 5.5 5.7 V
VLN5 Line regulation 6.0 V < VCC < 18 V, IVREG5 = 5 mA 20 mV
VLD5 Load regulation 0 mA < IVREG5 < 5 mA 100 mV
IREG5 Output current VCC = 6 V, VREG5 = 4.0 V, TA = 25°C 70 mA
MOSFET
Rdsonh High-side switch resistance 25°C, VBST – SW1, SW2 = 5.5 V 120 mΩ
Rdsonl Low-side switch resistance 25°C 70 mΩ
CURRENT LIMIT
Iocl Current limit TA = 25°C to 105°C 3.5 4.1 A
TA = –40°C 3.25 3.5
THERMAL SHUTDOWN
tSDN Thermal shutdown threshold Shutdown temperature 150 °C
Hysteresis 25
ON-TIME TIMER CONTROL
tON On time VIN = 12 V, VO = 1.05 V 145 ns
tOFF(MIN) Minimum off time TA = 25°C, VFB = 0.7 V 260 ns
SOFT START
ISSC SS charge current VSS = 0 V 1.4 2.0 2.6 μA
ISSD SS discharge current VSS = 0.5 V 0.1 0.2 mA
POWER GOOD
VTHPG PG threshold VFB rising (good) 85% 90% 95%
VFB falling (fault) 85%
IPG PG sink current PG = 0.5 V 2.5 5 mA
OUTPUT UNDERVOLTAGE AND OVERVOLTAGE PROTECTION
VOVP Output OVP trip threshold OVP detect 115% 120% 125%
TOVPDEL Output OVP prop delay 5 μs
VUVP Output UVP trip threshold UVP detect 65% 70% 75%
Hysteresis 10%
tUVPDEL Output UVP delay 0.25 ms
tUVPEN Output OVP enable delay Relative to soft-start time × 1.7
UVLO
VUVLO UVLO threshold Wake-up VREG5 voltage 3.45 3.70 3.95 V
Hysteresis VREG5 voltage 0.15 0.25 0.35