SLVS875D January   2009  – September 2023 TPS54332

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics: Characterization Curves
    8. 6.8 Typical Characteristics: Supplemental Application Curves
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Voltage Reference (Vref)
      3. 7.3.3  Bootstrap Voltage (BOOT)
      4. 7.3.4  Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
      5. 7.3.5  Programmable Slow Start Using the SS Pin
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Slope Compensation
      8. 7.3.8  Current Mode Compensation Design
      9. 7.3.9  Overcurrent Protection and Frequency Shift
      10. 7.3.10 Overvoltage Transient Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 3.5 V
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Eco-mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH® Tools
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Output Voltage Set Point
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Output Filter Components
        6. 8.2.2.6  Inductor Selection
        7. 8.2.2.7  Capacitor Selection
        8. 8.2.2.8  Compensation Components
        9. 8.2.2.9  Bootstrap Capacitor
        10. 8.2.2.10 Catch Diode
        11. 8.2.2.11 Output Voltage Limitations
        12. 8.2.2.12 Power Dissipation Estimate
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Estimated Circuit Area
      4. 8.4.4 Electromagnetic Interference (EMI) Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design with WEBENCH® Tools
    2. 9.2 Support Resources
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-8BE3F8A9-B02A-4C88-99A7-0087B646E9AA-low.gif Figure 5-1 DDA Package, 8-Pin SO PowerPAD™ Integrated Circuit Package (Top View)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
BOOT 1 O A 0.1-μF bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed.
VIN 2 I Input supply voltage, 3.5 V to 28 V.
EN 3 I Enable pin. Pull below 1.25 V to disable. Float to enable. TI recommends programming the input undervoltage lockout with two resistors.
SS 4 I Slow-start pin. An external capacitor connected to this pin sets the output rise time.
VSENSE 5 I Inverting node of the gm error amplifier.
COMP 6 O Error amplifier output, and input to the PWM comparator. Connect frequency compensation components to this pin.
GND 7 — Ground
PH 8 O The source of the internal high-side power MOSFET
PowerPAD 9 — GND pin must be connected to the exposed pad for proper operation.