SLVSCD5D November   2014  – February 2016 TPS54335-1A , TPS54335A , TPS54336A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency PWM Control
      2. 7.3.2  Light-Load Operation
      3. 7.3.3  Voltage Reference
      4. 7.3.4  Adjusting the Output Voltage
      5. 7.3.5  Enabling and Adjusting Undervoltage Lockout
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Slope Compensation and Output Current
      8. 7.3.8  Safe Startup into Pre-Biased Outputs
      9. 7.3.9  Bootstrap Voltage (BOOT)
      10. 7.3.10 Adjustable Switching Frequency (TPS54335A Only)
      11. 7.3.11 Soft-Start (TPS54336A Only)
      12. 7.3.12 Output Overvoltage Protection (OVP)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.13.2 Low-Side MOSFET Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
      15. 7.3.15 Small-Signal Model for Loop Response
      16. 7.3.16 Simple Small-Signal Model for Peak Current-Mode Control
      17. 7.3.17 Small-Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 4.5 V (minimum VI)
      2. 7.4.2 Operation With EN Control
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Supplementary Guidance
      2. 8.1.2 Differences Between the Two DRC Packages
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Output Voltage Set Point
        4. 8.2.2.4 Undervoltage Lockout Set Point
        5. 8.2.2.5 Input Capacitors
        6. 8.2.2.6 Output Filter Components
          1. 8.2.2.6.1 Inductor Selection
          2. 8.2.2.6.2 Capacitor Selection
        7. 8.2.2.7 Compensation Components
        8. 8.2.2.8 Bootstrap Capacitor
        9. 8.2.2.9 Power Dissipation Estimate
      3. 8.2.3 Application Curves
      4. 8.2.4 TPS54336A Typical Application
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
          1. 8.2.4.2.1 TPS54336A Design
          2. 8.2.4.2.2 Soft-Start Capacitor
        3. 8.2.4.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Device Support
      1. 11.3.1 Development Support
    4. 11.4 Documentation Support
      1. 11.4.1 Related Documentation
    5. 11.5 Related Links
    6. 11.6 Community Resource
    7. 11.7 Trademarks
    8. 11.8 Electrostatic Discharge Caution
    9. 11.9 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRC|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DDA Package
8-Pin SO PowerPAD
TPS54335A Top View
TPS54335A TPS54335-1A TPS54336A po_dda_8_35_slvscd5.gif
DDA Package
8-Pin SO PowerPAD
TPS54336A Top View
TPS54335A TPS54335-1A TPS54336A po_dda_8_36_slvscd5.gif
DRC Package
10-Pin VSON With Exposed Thermal Pad
TPS54335A and TPS54335-1A Top View
TPS54335A TPS54335-1A TPS54336A po_drc_10_35_slvscd5.gif
DRC Package
10-Pin VSON With Exposed Thermal Pad
TPS54336A Top View
TPS54335A TPS54335-1A TPS54336A po_drc_10_36_slvscd5.gif

Table 1. Pin Functions

PIN I/O DESCRIPTION
NAME SO PowerPAD VSON
BOOT 1 9 O A bootstrap capacitor is required between the BOOT and PH pins. If the voltage on this capacitor is below the minimum required by the output device, the output is forced to switch off until the capacitor is refreshed.
COMP 6 7 O This pin is the error-amplifier output and the input to the output switch-current comparator. Connect frequency compensation components to this pin.
EN 7 8 I This pin is the enable pin. Float the EN pin to enable.
GND 4 3 Ground
GND 4 4 Ground
GND 4 5 Ground
PH 3 2 O The PH pin is the source of the internal high-side power MOSFET.
RT (TPS54335A and TPS54335-1A) 8 10 O Connect the RT pin to an external timing resistor to adjust the switching frequency of the device.
SS (TPS54336A) 8 10 O The SS pin is the soft-start and tracking pin. An external capacitor connected to this pin sets the internal voltage-reference rise time. The voltage on this pin overrides the internal reference.
VIN 2 1 This pin is the 4.5- to 28-V input supply voltage.
VSENSE 5 6 I This pin is the inverting node of the transconductance (gm) error amplifier.
PowerPAD (SO only) For proper operation, connect the GND pin to the exposed thermal pad. This thermal pad should be connected to any internal PCB ground plane using multiple vias for good thermal performance.
Thermal pad (VSON only)