SLVSH68B
June 2023 – June 2024
TPS543B25T
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
VIN Pins and VIN UVLO
6.3.2
Internal Linear Regulator and Bypassing
6.3.3
Enable and Adjustable UVLO
6.3.3.1
Internal Sequence of Events During Start-Up
6.3.4
Switching Frequency Selection
6.3.5
Switching Frequency Synchronization to an External Clock
6.3.5.1
Internal PWM Oscillator Frequency
6.3.5.2
Loss of Synchronization
6.3.5.3
Interfacing the SYNC/FSEL Pin
6.3.6
Remote Sense Amplifier and Adjusting the Output Voltage
6.3.7
Loop Compensation Guidelines
6.3.7.1
Output Filter Inductor Tradeoffs
6.3.7.2
Ramp Capacitor Selection
6.3.7.3
Output Capacitor Selection
6.3.7.4
Design Method for Good Transient Response
6.3.8
Soft Start and Prebiased Output Start-Up
6.3.9
MSEL Pin
6.3.10
Power Good (PG)
6.3.11
Output Overload Protection
6.3.11.1
Positive Inductor Current Protection
6.3.11.2
Negative Inductor Current Protection
6.3.12
Output Overvoltage and Undervoltage Protection
6.3.13
Overtemperature Protection
6.3.14
Output Voltage Discharge
6.4
Device Functional Modes
6.4.1
Forced Continuous-Conduction Mode
6.4.2
Discontinuous Conduction Mode During Soft Start
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
1.0V Output, 1MHz Application
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Custom Design With WEBENCH® Tools
7.2.1.2.2
Switching Frequency
7.2.1.2.3
Output Inductor Selection
7.2.1.2.4
Output Capacitor
7.2.1.2.5
Input Capacitor
7.2.1.2.6
Adjustable Undervoltage Lockout
7.2.1.2.7
Output Voltage Resistors Selection
7.2.1.2.8
Bootstrap Capacitor Selection
7.2.1.2.9
VDRV and VCC Capacitor Selection
7.2.1.2.10
PGOOD Pullup Resistor
7.2.1.2.11
Current Limit Selection
7.2.1.2.12
Soft-Start Time Selection
7.2.1.2.13
Ramp Selection and Control Loop Stability
7.2.1.2.14
MODE Pin
7.2.1.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
7.4.3
Thermal Performance
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Custom Design With WEBENCH® Tools
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RAS|17
MPQF747
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsh68b_oa
slvsh68b_pm
1
Features
Integrated 6.5mΩ and 2mΩ MOSFETs
4V to 18V input voltage range
Fixed-frequency, internally compensated, advanced current mode (ACM) control
0.5V to 7V output voltage range
True differential remote sense amplifier (RSA)
Three selectable PWM ramp options to optimize the control loop performance
Five selectable switching frequencies: 500kHz, 750kHz, 1MHz, 1.5MHz, and 2.2MHz
Synchronizable to an external clock
0.5V, ±0.5% voltage reference accuracy over full temperature range
1ms, 2ms, 4ms, and 8ms selectable soft-start times
Monotonic start-up into prebiased outputs
Selectable current limits to support
25
A and
20
A operation
Enable with adjustable input undervoltage lockout
Power-good output monitor
Output overvoltage, output undervoltage, input undervoltage, overcurrent, and overtemperature protection
–40°C to 150°C operating junction temperature
2.5mm × 4.5mm, 17-pin WQFN-HR package with 0.5mm pitch
Lead-free (RoHS compliant),
Lead-free (Pb-free) conversion
Pin compatible with the
20A -
TPS543B22
, 16A -
TPS543A26
, and 12A -
TPS543A22
Create a custom design using the
TPS543B25T
with the
WEBENCH®
Power Designer