It is absolutely critical that all GND pins, including AGND (pin 29), GND (pin 27), and PGND (pins 13, 14, 15, 16, 17, 18, 19, and 20) are connected directly to the thermal pad underneath the device via traces or plane. The number of thermal vias needed to support 40-A thermal operation should be as many as possible; in the EVM design orderable on the Web, a total of 23 thermal vias are used. The TPS543C20EVM-799 is available for purchase at ti.com.
Place the power components (including input/output capacitors, output inductor, and TPS543C20 device) on one side of the PCB (solder side). At least one or two innner layers/planes must be inserted, connecting to power ground, in order to shield and isolate the small signal traces from noisy power lines.
Place the VIN decoupling capacitors as close to the PVIN and PGND as possible to minimize the input AC current loop. The high frequency decoupling capacitor (1 nF to 0.1 µF) should be placed next to the PVIN pin and PGND pin as close as the spacing rule allows. This helps surpressing the switch node ringing.
Place a 10-nF to 100-nF capacitor close to IC from Pin 25 VIN to Pin 27 GND.
Place VDD and BP decoupling capacitors as close to the device pins as possible. Do not use PVIN plane connection for VDD. VDD needs to be tapped off from PVIN with separate trace connection. Ensure to provide GND vias for each decoupling capacitor and make the loop as small as possible.
The PCB trace defined as switch node, which connects the SW pins and up-stream of the output inductor should be as short and wide as possible. In web orderable EVM design, the SW trace width is 400 mil. Use separate via or trace to connect SW node to snubber and bootstrap capacitor. Do not combine these connections.
All sensitive analog traces and components such as RAMP, RSP, RSN, ILIM, MODE, VSEL and RT should be placed away from any high voltage switch node (itself and others), such as SW and BOOT to avoid noise coupling. In addition, MODE, VSEL, ILIM, RAMP and RT programming resistors should be placed near the device/pins.
The RSP and RSN pins operate as inputs to a differential remote sense amplifier that operates with very high impedance. It is essential to route the RSP and RSN pins as a pair of diff-traces in Kelvin-sense fashion. Route them directly to either the load sense points (+ and –) or the output bulk capacitors. The internal circuit uses the RSP pin for on-time adjustment. It is critical to tie the RSP pin directly tied to VOUT (load sense point) for accurate output voltage result.
Use caution when routing of the SYNC, VSHARE and ISHARE traces for 2-phase configurations. The SYNC trace carries a rail-to-rail signal and should be routed away from sensitive analog signals, including the VSHARE, ISHARE, RT, and FB signals. The VSHARE and ISHARE traces should also be kept away from fast switching voltages or currents formed by the PVIN, AVIN, SW, BOOT, and BP pins.