SLVS946E September   2009  – April 2018 TPS54418

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Efficiency vs Output Current
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation and Output Current
      3. 7.3.3  Bootstrap Voltage (Boot) and Low Dropout Operation
      4. 7.3.4  Error Amplifier
      5. 7.3.5  Voltage Reference
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Enable and Adjusting Undervoltage Lockout
      8. 7.3.8  Soft-Start Pin
      9. 7.3.9  Sequencing
      10. 7.3.10 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      11. 7.3.11 Overcurrent Protection
      12. 7.3.12 Frequency Shift
      13. 7.3.13 Reverse Overcurrent Protection
      14. 7.3.14 Synchronize Using the RT/CLK Pin
      15. 7.3.15 Power Good (PWRGD Pin)
      16. 7.3.16 Overvoltage Transient Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Small Signal Model for Loop Response
      2. 7.4.2 Simple Small Signal Model for Peak Current Mode Control
      3. 7.4.3 Small Signal Model for Frequency Compensation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Step One: Select the Switching Frequency
        2. 8.2.2.2  Step Two: Select the Output Inductor
        3. 8.2.2.3  Step Three: Choose the Output Capacitor
        4. 8.2.2.4  Step Four: Select the Input Capacitor
        5. 8.2.2.5  Step Five: Minimum Load DC COMP Voltage
        6. 8.2.2.6  Step Six: Choose the Soft-Start Capacitor
        7. 8.2.2.7  Step Seven: Select the Bootstrap Capacitor
        8. 8.2.2.8  Step Eight: Undervoltage Lockout Threshold
        9. 8.2.2.9  Step Nine: Select Output Voltage and Feedback Resistors
          1. 8.2.2.9.1 Output Voltage Limitations
        10. 8.2.2.10 Step 10: Select Loop Compensation Components
        11. 8.2.2.11 Power Dissipation Estimate
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
      2. 11.1.2 Development Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Application Curves

TPS54418 eff_cur_lvs946.gif
Figure 38. Efficiency vs Load Current
TPS54418 vo_io_lvs946.gif
2-A Current Step
Figure 40. Transient Response
TPS54418 pwr_up_lvs946.gif
Figure 42. Power Up VOUT, VIN
TPS54418 pwrup2_lvs946.gif
Figure 44. Power Up VOUT, EN
TPS54418 output_rip_lvs946.gif
IOUT = 0 A
Figure 46. Output Ripple
TPS54418 input_rip_lvs946.gif
IOUT = 0 A
Figure 48. Input Ripple
TPS54418 loop_33v_lvs946.gif
VIN = 3.3 V IOUT = 4 A
Figure 50. Closed Loop Response
TPS54418 reg2_cur_lvs946.gif
Figure 52. Load Regulation vs Load Current
TPS54418 eff2_cur_lvs946.gif
Figure 39. Efficiency vs Load Current
TPS54418 vo2_io_lvs946.gif
4-A Current Step
Figure 41. Transient Response
TPS54418 pwr_dwn_lvs946.gif
Figure 43. Power Down Vout, Vin
TPS54418 pwrdwn2_lvs946.gif
Figure 45. Power Down VOUT, EN
TPS54418 out_rip2_lvs946.gif
IOUT = 4 A
Figure 47. Output Ripple
TPS54418 in_rip2_lvs946.gif
IOUT = 4 A
Figure 49. Input Ripple
TPS54418 reg_cur_lvs946.gif
Figure 51. Load Regulation vs Load Current
TPS54418 reg_vi_lvs946.gif
Figure 53. Regulation vs Input Voltage