SLVSB43C November   2011  – February 2016 TPS54427

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive On-Time Control
      3. 7.3.3 Soft Start and Pre-Biased Soft Start
      4. 7.3.4 Current Protection
      5. 7.3.5 UVLO Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Forced CCM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Design Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS54427 is used as a step converter that convert an voltage of 4.5 V to 18 V to a lower voltage. WEBENCH® software is available to aid in the design and analysis of circuits.

8.2 Typical Application

TPS54427 sch_lvsb43.gif Figure 10. Typical Application Schematic

8.2.1 Design Requirements

Table 1 shows the input and output connections.

Table 1. TPS54427 Performance Specifications Summary

SPECIFICATIONS TEST CONDITIONS MIN TYP MAX UNIT
Input voltage range, VIN 4.5 12 18 V
Output voltage, VOUT 1.05 V
Operating frequency VIN = 12 V, IO = 4 A 650 kHz
Output current range 0 4 A
Output ripple voltage VIN = 12 V, IO = 4 A 15 mVPP

8.2.2 Detailed Design Procedure

To begin the design process, you must know a few application parameters:

  • Input voltage range
  • Output voltage
  • Output current
  • Output voltage ripple
  • Input voltage ripple

8.2.2.1 Output Voltage Resistors Selection

The output voltage is set with a resistor divider from the output node to the VFB pin. It is recommended to use 1% tolerance or better divider resistors. Start by using Equation 2 to calculate VOUT.

To improve efficiency at very light loads consider using larger value resistors, too high of resistance will be more susceptible to noise and voltage errors from the VFB input current will be more noticeable.

Equation 2. TPS54427 EQ2_Vout_lvsb43.gif

8.2.2.2 Output Filter Selection

The output filter used with the TPS54427 is an LC circuit. This LC filter has double pole at:

Equation 3. TPS54427 EQ3_Fp_lvsb43.gif

At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54427. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly. D-CAP2™ introduces a high frequency zero that reduces the gain roll off to –20 dB per decade and increases the phase to 90 degrees one decade above the zero frequency. The inductor and capacitor selected for the output filter must be selected so that the double pole of Equation 3 is located below the high frequency zero but close enough that the phase boost provided be the high frequency zero provides adequate phase margin for a stable circuit. To meet this requirement use the values recommended in Table 2.

Table 2. Recommended Component Values

OUTPUT VOLTAGE (V) R1 (kΩ) R2 (kΩ) C4 (pF)(1) L1 (µH) C8 + C9 (µF)
1 6.81 22.1 1.5 22 - 68
1.05 8.25 22.1 1.5 22 - 68
1.2 12.7 22.1 1.5 22 - 68
1.5 21.5 22.1 1.5 22 - 68
1.8 30.1 22.1 5 - 22 2.2 22 - 68
2.5 49.9 22.1 5 - 22 2.2 22 - 68
3.3 73.2 22.1 5 - 22 2.2 22 - 68
5 124 22.1 5 - 22 3.3 22 - 68
6.5 165 22.1 5 - 22 3.3 22 - 68
(1) Optional

For higher output voltages at or above 1.8 V, additional phase boost can be achieved by adding a feed forward capacitor (C4) in parallel with R1.

The inductor peak-to-peak ripple current, peak current and RMS current are calculated using Equation 4, Equation 5 and Equation 6. The inductor saturation current rating must be greater than the calculated peak current and the RMS or heating current rating must be greater than the calculated RMS current. Use 650 kHz for fSW.

Use 650 kHz for fSW. Make sure the chosen inductor is rated for the peak current of Equation 5 and the RMS current of Equation 6.

Equation 4. TPS54427 EQ4_ipp_lvsb43.gif
Equation 5. TPS54427 EQ5_ipeak_lvsb43.gif
Equation 6. TPS54427 EQ6_ilo_lvsb43.gif

For this design example, the calculated peak current is 4.51 A and the calculated RMS current is 4.01 A. The inductor used is a TDK SPM6530-1R5M100 with a peak current rating of 11.5 A and an RMS current rating
of 11 A.

The capacitor value and ESR determines the amount of output voltage ripple. The TPS54427 is intended for use with ceramic or other low ESR capacitors. Recommended values range from 22µF to 68µF. Use Equation 7 to determine the required RMS current rating for the output capacitor.

Equation 7. TPS54427 EQ7_ico_lvsb43.gif

For this design two TDK C3216X5R0J226M 22µF output capacitors are used. The typical ESR is 2 mΩ each. The calculated RMS current is 0.286A and each output capacitor is rated for 4A.

8.2.2.3 Input Capacitor Selection

The TPS54427 requires an input decoupling capacitor and a bulk capacitor is needed depending on the application. A ceramic capacitor over 10 µF is recommended for the decoupling capacitor. An additional 0.1 µF capacitor (C3) from pin 8 to ground is optional to provide additional high frequency filtering. The capacitor voltage rating needs to be greater than the maximum input voltage.

8.2.2.4 Bootstrap Capacitor Selection

A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommended to use a ceramic capacitor.

8.2.2.5 VREG5 Capacitor Selection

A 1-µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommended to use a ceramic capacitor.

8.2.3 Application Curves

TPS54427 Eff_lin_lvu579.png Figure 11. TPS54427 Efficiency
TPS54427 LoadReg_lvu579.png Figure 13. TPS54427 Load Regulation, VIN = 5 V and VIN = 12 V.
TPS54427 LoadTran12_lvu579.gif Figure 15. TPS54427 Load Transient Response
TPS54427 RipIn12_lvu579.gif Figure 17. TPS54427 Input Voltage Ripple
TPS54427 UVLOstop_lvu579.gif Figure 19. TPS54427 Shut-down Relative to VIN
TPS54427 ENstop_lvu579.gif Figure 21. TPS54427 Shut-down Relative to EN
TPS54427 Eff_log_lvu579.png Figure 12. TPS54427 Light-Load Efficiency
TPS54427 LineReg_lvu579.png Figure 14. TPS54427 Line Regulation
TPS54427 Ripple12_lvu579.gif Figure 16. TPS54427 Output Voltage Ripple
TPS54427 UVLOstart_lvu579.gif Figure 18. TPS54427 Start-Up Relative to VIN
TPS54427 ENstart_lvu579.gif Figure 20. TPS54427 Start-Up Relative to EN