SLVS834B July   2008  – June 2019 TPS5450-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic and Efficiency Curve
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Recommended Operating Conditions
    3. 6.3 Thermal Information
    4. 6.4 Dissipation Ratings
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Oscillator Frequency
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Enable (ENA) and Internal Slow Start
      4. 7.3.4  Undervoltage Lockout (UVLO)
      5. 7.3.5  Output Feedback (VSENSE) and Internal Compensation
      6. 7.3.6  Voltage Feedforward
      7. 7.3.7  Pulse-Width-Modulation (PWM) Control
      8. 7.3.8  Overcurrent Limiting
      9. 7.3.9  Overvoltage Protection
      10. 7.3.10 Thermal Shutdown
  8. Application Information
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Boost Capacitor (BOOT)
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Output Filter Components
          1. 8.2.2.5.1 Inductor Selection
          2. 8.2.2.5.2 Capacitor Selection
        6. 8.2.2.6  Output Voltage Setpoint
        7. 8.2.2.7  Boot Capacitor
        8. 8.2.2.8  Catch Diode
        9. 8.2.2.9  Output Voltage Limitations
        10. 8.2.2.10 Internal Compensation Network
      3. 8.2.3 Application Curves
  9. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Examples
    3. 9.3 Thermal Calculations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Development Support
      1. 10.2.1 Custom Design With WEBENCH® Tools
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Community Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Internal Compensation Network

The design equations given in the example circuit can be used to generate circuits using the TPS5450-Q1. These designs are based on certain assumptions and will tend to always select output capacitors within a limited range of ESR values. If a different capacitor type is desired, it may be possible to fit one to the internal compensation of the TPS5450-Q1. Equation 15 gives the nominal frequency response of the internal voltage-mode type III compensation network:

Equation 15. TPS5450-Q1 q2_hs_lvs632.gif

where

  • Fp0 = 2165 Hz, Fz1 = 2170 Hz, Fz2 = 2590 Hz
  • Fp1 = 24 kHz, Fp2 = 54 kHz, Fp3 = 440 kHz
  • Fp3 represents the non-ideal parasitics effect

Using this information along with the desired output voltage, feed forward gain and output filter characteristics, the closed loop transfer function can be derived.