SLVS757E March   2007  – July 2022 TPS5450

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Oscillator Frequency
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Enable (ENA) and Internal Slow-Start
      4. 7.3.4  Undervoltage Lockout (UVLO)
      5. 7.3.5  Boost Capacitor (BOOT)
      6. 7.3.6  Output Feedback (VSENSE) and Internal Compensation
      7. 7.3.7  Voltage Feed-Forward
      8. 7.3.8  Pulse-Width-Modulation (PWM) Control
      9. 7.3.9  Overcurrent Limiting
      10. 7.3.10 Overvoltage Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation near Minimum Input Voltage
      2. 7.4.2 Operation With ENA Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Filter Components
        5. 8.2.2.5 Inductor Selection
        6. 8.2.2.6 Capacitor Selection
        7.       43
        8. 8.2.2.7 Boot Capacitor
        9. 8.2.2.8 Catch Diode
        10. 8.2.2.9 Advanced Information
          1. 8.2.2.9.1 Output Voltage Limitations
          2. 8.2.2.9.2 Internal Compensation Network
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Calculations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DDA|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1)(2)(3)TPS5450UNIT
DDA
8 PINS
RθJAJunction-to-ambient thermal resistance (custom board) (4)30°C/W
RθJAJunction-to-ambient thermal resistance (standard board)42.3
ψJTJunction-to-top characterization parameter4.9
ψJBJunction-to-board characterization parameter20.7
RθJC(top)Junction-to-case(top) thermal resistance46.4
RθJC(bot)Junction-to-case(bottom) thermal resistance0.8
RθJBJunction-to-board thermal resistance20.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Maximum power dissipation may be limited by overcurrent protection
(3) Power rating at a specific ambient temperature TA should be determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long-term reliability. See Section 10.3 for more information.
(4) Test boards conditions:
  1. 2 in x 1.85 in, 4 layers, thickness: 0.062 inch (1.57 mm).
  2. 2 oz. copper traces located on the top of the PCB
  3. 2 oz. copper ground planes on the 2 internal layers and bottom layer
  4. 4 thermal vias (10mil) located under the device package