SLUSF22 November 2024 TPS54538
PRODUCTION DATA
Every switching converter has a minimum controllable on time dictated by the inherent delays and blanking times associated with the control circuits, which imposes a minimum switch duty cycle and, therefore, a minimum conversion ratio. The constraint is encountered at high input voltages and low output voltages. To help extend the minimum controllable duty cycle, the TPS54538 automatically reduces the switching frequency when the minimum on-time limit is reached. This way, the converter can regulate the lowest programmable output voltage at the maximum input voltage. Use Equation 14 to find an estimate for the approximate input voltage for a given output voltage before frequency foldback occurs. The values of tON_MIN and fSW can be found in Section 5.5.
As the input voltage is increased, the switch on time (duty-cycle) reduces to regulate the output voltage. When the on time reaches the minimum on time, tON_MIN, the switching frequency drops while the on time remains fixed.