The TPS54560B is a 60-V, 5-A step-down regulator with an integrated high side MOSFET. Current-mode control provides simple external compensation and flexible component selection. A low-ripple pulse-skip mode reduces no-load-supply current to 146 μA. Shutdown supply current is reduced to 2 μA when the EN (enable) pin is pulled low.
Undervoltage lockout is internally set at 4.3 V but can be increased using the EN pin. Output voltage start-up ramp is internally controlled to provide a controlled start-up and eliminate overshoot.
A wide switching frequency range allows either efficiency or external component size to be optimized. Output current is limited cycle-by-cycle. Frequency foldback and thermal shutdown protects internal and external components during an overload condition.
The TPS54560B is available in an 8-pin thermally enhanced HSOIC PowerPAD package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
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TPS54560B | HSOIC (8) | 4.89 mm × 3.90 mm |
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DATE | REVISION | NOTES |
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January 2019 | * | Initial release |
PIN | I/O | DESCRIPTION | |
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NO. | NAME | ||
1 | BOOT | O | A bootstrap capacitor is required between BOOT and SW. If the voltage on this capacitor is below the minimum required to operate the high side MOSFET, the output is switched off until the capacitor is refreshed. |
2 | VIN | I | Input supply voltage with 4.5-V to 60-V operating range. |
3 | EN | I | Enable pin, with internal pullup current source. Pull below 1.2 V to disable. Float to enable. Adjust the input undervoltage lockout with two resistors. See the Enable and Adjusting Undervoltage Lockout section. |
4 | RT/CLK | I | Resistor timing and external clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the operating mode returns to resistor frequency programming. |
5 | FB | I | Inverting input of the transconductance (gm) error amplifier. |
6 | COMP | O | Error amplifier output and input to the output switch current (PWM) comparator. Connect frequency compensation components to this pin. |
7 | GND | — | Ground |
8 | SW | I | The source of the internal high-side power MOSFET and switching node of the converter. |
— | Thermal pad | — | GND pin must be electrically connected to the exposed pad on the printed circuit board for proper operation. |