SLUSF28 November 2023 TPS546A24S
PRODUCTION DATA
| CMD Address | DCh |
| Write Transaction: | Write Word |
| Read Transaction: | Read Word |
| Format: | Unsigned Binary (2 bytes) |
| Phased: | Yes |
| Updates: | On-the-fly |
| NVM Back-up: | No |
When PHASE = FFh or 80h, reads to this command return a data word detailing which phases have experienced fault conditions. When PHASE != FFh, reads to this command return a data word with a 1 in the bit 0 position if the active phase is reporting any status bit. Bits corresponding to unused (unassigned or disabled) phase numbers are always equal to 0b.
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| R | R | R | R | RW | RW | RW | RW | RW | RW | RW | RW | RW | RW | RW | RW |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | PH3 | PH2 | PH1 | PH0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 15:4 | Reserved | R | 0b | Reserved |
| 3 | PH3 | RW | 0b | 0b: The TPS546A24S assigned to PHASE = 3d has NOT experienced a fault. 1b: The TPS546A24S assigned to PHASE = 3d has experienced a fault. Set PHASE = 3d, and read STATUS_WORD or STATUS_ALL for more information. |
| 2 | PH2 | RW | 0b | 0b: The TPS546A24S assigned to PHASE = 2d has NOT experienced a fault. 1b: The TPS546A24S assigned to PHASE = 2d has experienced a fault. Set PHASE = 2d, and read STATUS_WORD or STATUS_ALL for more information. |
| 1 | PH1 | RW | 0b | 0b: The TPS546A24S assigned to PHASE = 1d has NOT experienced a fault. 1b: The TPS546A24S assigned to PHASE = 1d has experienced a fault. Set PHASE = 1d, and read STATUS_WORD or STATUS_ALL for more information. |
| 0 | PH0 | RW | 0b | 0b: The TPS546A24S assigned to PHASE = 0d has NOT experienced a fault. 1b: The TPS546A24S assigned to PHASE = 0d has experienced a fault. Set PHASE = 0d, and read STATUS_WORD or STATUS_ALL for more information. |