SLUSF28 November 2023 TPS546A24S
PRODUCTION DATA
CMD Address | 7Ah |
Write Transaction: | Write Byte |
Read Transaction: | Read Byte |
Format: | Unsigned Binary (1 byte) |
Phased: | No |
NVM Back-up: | No |
Updates: | On-the-fly |
The STATUS_VOUT command returns one data byte with contents as follows. All supported bits can be cleared either by CLEAR_FAULTS, or individually by writing 1b to the (7Ah) STATUS_VOUT register in their position, per the PMBus 1.3.1 Part II specification section 10.2.4.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | RW | RW | RW | RW | RW | R | R |
VOUT_OVF | VOUT_OVW | VOUT_UVW | VOUT_UVF | VOUT_MIN_MAX | TON_MAX | 0 | 0 |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
7 | VOUT_ OVF | RW | 0b | 0b: Latched flag indicating VOUT OV fault has NOT occurred. 1b: Latched flag indicating a VOUT OV fault has occurred. Note: the mask bits for VOUT_ OVF will mask fixed, tracking, and pre-biased OVP. These can be individually controlled in SMBALERT_ MASK_ EXTENDED. |
6 | VOUT_ OVW | RW | 0b | 0b: Latched flag indicating VOUT OV warn has NOT occurred. 1b: Latched flag indicating a VOUT OV warn has occurred. Note: the mask bits for VOUT_ OVF will mask fixed and tracking Overvoltage Protection. |
5 | VOUT_ UVW | RW | 0b | 0b: Latched flag indicating VOUT UV warn has NOT occurred. 1b: Latched flag indicating a VOUT UV warn has occurred. |
4 | VOUT_ UVF | RW | 0b | 0b: Latched flag indicating VOUT UV fault has NOT occurred. 1b: Latched flag indicating a VOUT UV fault has occurred. |
3 | VOUT_ MIN_MAX | RW | 0b | 0b: Latched flag indicating a VOUT_ MIN_MAX has NOT occurred. 1b: Latched flag indicating a VOUT_ MIN_MAX has occurred. |
2 | TON_ MAX | RW | 0b | 0b: Latched flag indicating a TON_ MAX has NOT occurred. 1b: Latched flag indicating a TON_ MAX has occurred. |
1:0 | Not supported | R | 00b | Not supported and always set to 00b. |
All bits which can trigger SMBALERT have a corresponding bit in SMBALERT_MASK.