The IOUT_OC_FAULT_LIMIT command sets the value of the output current that causes the overcurrent detector to indicate an overcurrent fault condition. The thresholds selected here are compared to the sensed low-side valley current. See Overcurrent Limit and Low-side Current Sense for more details.

Return to Supported PMBus Commands.

Data Validity

Every mantissa binary value in the writable bits is writeable and readable. However, the actual divider is set to the nearest supported value. Additionally, that mantissa value restored from EEPROM is fixed for each setting supported in hardware.

* Attempts to change the read-only bits (IOUT_OC_FAULT_LIMIT[15:8]) will be considered invalid/unsupported data when STACK_NUMBER[1:0] is = 1b. The device will NACK the unsupported data and the received value will be ignored. The ’cml’ bit in the STATUS_BYTE and the ‘ivd’ bit in the STATUS_CML registers will be set.

** Attempts to change the read-write bit (IOUT_OC_FAULT_LIMIT[7]) will only be considered valid data if STACK_NUMBER[1:0] is > 2b.

*** Attempts to change the read-write bit (IOUT_OC_FAULT_LIMIT[6]) will only be considered valid data if STACK_NUMBER[1:0] is > 1b.

Response to P2_PLUS_WRITE Commands

When the PMBus host attempts to execute a P2+ write to IOUT_OC_FAULT_LIMIT with the PHASE data in the command set to FFh, the expectation is to equally divide the commanded net “Stack OC” level among the phases as their individual “Phase OC” settings. In order to achieve that, the device does the following:

• If STACK_NUMBER[1:0] is 2 (i.e., 2-phase operation), then the incoming commanded Stack OC level is converted to the individual Phase OC level by adding 1, followed by right-shift of 1 bit (i.e., dividing by 2, rounded up). The resulting Phase OC level is then binned into the appropriate IOUT_OC value based on the IOUT__OC_FAULT_LIMIT tables above.
• If STACK_NUMBER[1:0] is 4 (i.e., 4-phase operation), then the incoming commanded Stack OC level is converted to the individual Phase OC level by adding 2, followed by right-shift of 2 bits (i.e., dividing by 4, rounded up). The resulting Phase OC level is then binned into the appropriate IOUT_OC value based on the IOUT_OC_FAULT_LIMIT tables above.
• If STACK_NUMBER[1:0] is 3 (i.e., 3-phase operation), then the incoming commanded Stack OC level is directly converted to the PHASE IOUT_OC value using the table below:

Response to P2_PLUS_READ Commands

When the PMBus host attempts to execute a P2+ read on IOUT_OC_FAULT_LIMIT with the PHASE data in the command set to FFh, only the primary device will respond to P2+ read commands with incoming data for PHASE=FFh. The primary device multiplies the IOUT_OC level by the STACK_NUMBER and reports the product back on the PMBus. For example, if the IOUT_OC is 24A for the primary phase in a 3-phase rail, then a P2+ read with PHASE=FFh will yield 24 x 3 = 72A as the read-back value.