SLVSHH4 July 2024 TPS546E25
ADVANCE INFORMATION
CMD Address | 24h |
Write Transaction: | Write Word |
Read Transaction: | Read Word |
Format: | ULINEAR16, Absolute Only per VOUT_MODE |
Phased: | No |
NVM Back-up: | EEPROM or Pin Detection |
Updates: | On-the-fly |
The VOUT_MAX command sets an upper limit on the output voltage the unit and can command regardless of any other commands or combinations. The intent of this command is to provide a safeguard against a user accidentally setting the output voltage to a possibly destructive level.
Return to Supported PMBus Commands.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
R | R | R | R | RW | RW | RW | RW |
0 | 0 | 0 | 0 | VOUT_MAX | |||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
VOUT_MAX |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
15:12 | 0 | R | 0b | Not supported and always 0. |
11:0 | VOUT_ MAX | RW | NVM | Maximum output voltage. LINEAR16 absolute per the setting of (20h) VOUT_MODE. Refer to the following description for data validity. |
The recommended data range for VOUT_MAX depends on the VOUT_SCALE_LOOP according to the table below:
VOUT_SCALE_LOOP mantissa | VOUT_MAX (V) | Data (d) |
---|---|---|
8d | 0.34 - 0.75 | 175-384 |
4d | 0.34 - 1.5 | 175 - 768 |
2d | 0.68 - 3 | 350 - 1536 |
1d | 1.36 - 5.75 | 700 - 2944 |
While conversion is enabled, any output voltage change (including VOUT_COMMAND, (22h) VOUT_TRIM, margin operations) that causes the new target voltage to be greater than the currenet value of VOUT_MAX will cause the VOUT_MAX_MIN_WARNING condition. This result causes the device to:
Although the scenario is uncommon, note that the same response results if the user attempted to program VOUT_MAX less than the current output voltage target.
In the event VOUT_MAX < (2Bh) VOUT_MIN, VOUT_MAX will dominate.
Data Validity
Attempts to write VOUT_MAX to any value outside those specified as valid will be considered invalid/unsupported data and cause the device to respond by flagging the appropriate status bits and notifying the host according to the PMBus 1.3.1 Part II specification section 10.9.3.