VIN and PGND traces should be as wide as possible to reduce trace impedance and improve heat dissipation.
At least 1 µF of input capacitance is required on both VIN pins of the IC and must be placed as close as possible to the IC. The input capacitors must connect directly to the adjacent PGND pins.
It is recommended to use a ground plane directly below the IC to connect the PGND pins on both sides of the IC together.
The PGND trace between the output capacitor and the PGND pin should be as wide as possible to minimize its trace impedance.
Provide sufficient vias for the input capacitor and output capacitor.
Keep the SW trace as physically short and wide as practical to minimize radiated emissions.
A separate VOUT path should be connected to the upper feedback resistor.
Voltage feedback loop should be placed away from the high-voltage switching trace. It is preferable to use ground copper near it as a shield.
The trace connected to the FB node should be as small as possible to avoid noise coupling.
Place components connected to the RT/CLK, FB, COMP and SS/TRK pins as close to the IC as possible and minimize traces connected to these pins to avoid noise coupling.
AGND must be connected to PGND on the PCB. Connect AGND to PGND in a region away from switching currents.