8.2.2.3 Output Capacitor

There are two primary considerations for selecting the value of the output capacitor. The output voltage ripple and how the regulator responds to a large change in load current. The output capacitance needs to be selected based on the more stringent of these two criteria.

The desired response to a large change in the load current is the first criteria and is typically the most stringent. A regulator does not respond immediately to a large, fast increase or decrease in load current. The output capacitor supplies or absorbs charge until the regulator responds to the load step. The control loop needs to sense the change in the output voltage then adjust the peak switch current in response to the change in load. The minimum output capacitance is selected based on an estimate of the loop bandwidth. Typically the loop bandwidth is f_SW/10. Equation 18 estimates the minimum output capacitance necessary, where ΔI_OUT is the change in output current and ΔV_OUT is the allowable change in the output voltage.

For this example, the transient load response is specified as a 4% change in V_OUT for a load step of 4 A. Therefore, ΔI_OUT is 4 A and ΔV_OUT is 72 mV. Using these numbers gives a minimum capacitance of 126 μF. This value does not take the ESR of the output capacitor into account in the output voltage change. For ceramic capacitors, the effect of the ESR can be small enough to be ignored. Aluminum electrolytic and tantalum capacitors have higher ESR that must be considered for load step response.

Equation 19 calculates the minimum output capacitance needed to meet the output voltage ripple specification. Where fsw is the switching frequency, Vripple is the maximum allowable output voltage ripple, and Iripple is the inductor ripple current. In this case, the target maximum output voltage ripple is 9 mV. Under this requirement, Equation 19 yields 46 µF.

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Equation 18.

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Equation 19.

Where:

• ΔI_OUT is the change in output current
• ΔV_OUT is the allowable change in the output voltage
• fsw is the regulators switching frequency

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Equation 20 calculates the maximum combined ESR the output capacitors can have to meet the output voltage ripple specification and this shows the ESR should be less than 4 mΩ. In this case ceramic capacitors will be used and the combined ESR of the ceramic capacitors in parallel is much less than 4 mΩ. Capacitors also have limits to the amount of ripple current they can handle without producing excess heat and failing. An output capacitor that can support the inductor ripple current must be specified. Capacitor datasheets specify the RMS (Root Mean Square) value of the maximum ripple current. Equation 21 can be used to calculate the RMS ripple current the output capacitor needs to support. For this application, Equation 21 yields 660 mA and the ceramic capacitors used in this design will have a ripple current rating much higher than this.

Equation 20.

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Equation 21.

X5R and X7R ceramic dielectrics or similar should be selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the DC bias and AC voltage derating taken into account. The derated capacitance value of a ceramic capacitor due to DC voltage bias and AC RMS voltage is usually found on the manufacturer's website. For this application example, four 47 μF 6.3 V 1206 X5R ceramic capacitors each with 3 mΩ of ESR are used. The estimated capacitance after derating using the capacitor manufacturer's website is 29 µF each. With 4 parallel capacitors the total effective output capacitance is 116 µF and the ESR is 0.7 mΩ. The effective capacitance used is less than originally calculated above because testing the real circuit on the bench showed that less capacitance was required to achieve the desired response.