SLVSE78D March 2020 – July 2021 TPS548A29
PRODUCTION DATA
The device requires input bypass capacitors between the VIN and PGND pins to bypass the power-stage. The bypass capacitors must be placed as close as possible to the pins of the IC as the layout will allow. At least 10 µF of ceramic capacitance and 1-µF high frequency ceramic bypass capacitors are required. A 1-μF, 16-V X6S size 0402 ceramic capacitor on VIN pin 21 is required. A 1-μF, 16-V X6S ceramic capacitor on VIN pin 10 is required. A 1-μF 16-V X6S ceramic capacitor on the bottom layer is recommended for high current applications. The high frequency bypass capacitor minimizes high frequency voltage overshoot across the power-stage. The ceramic capacitors must be high-quality dielectric of X6S or better for their high capacitance-to-volume ratio and stable characteristics across temperature. In addition to this, more bulk capacitance can be needed on the input depending on the application to minimize variations on the input voltage during transient conditions.
The input capacitance required to meet a specific input ripple target can be calculated with Equation 25. A recommended target input voltage ripple is 5% the minimum input voltage, 400 mV in this example. The calculated input capacitance is 10.07 µF and the minimum input capacitance of 10 µF exceeds this. This example meets these two requirements with 4 x 22-µF ceramic capacitors.
The capacitor must also have an RMS current rating greater than the maximum input RMS current in the application. The input RMS current the input capacitors must support is calculated by Equation 25 and is 6.96 A in this example. The ceramic input capacitors have a current rating greater than this.
For applications requiring bulk capacitance on the input, such as ones with low input voltage and high current, the selection process in the How To Select Input Capacitors For A Buck Converter technical brief is recommended.