The device requires input bypass capacitors between the VIN and PGND pins to bypass the power-stage. The bypass capacitors must be placed as close as possible to the pins of the IC as the layout will allow. At least 10 µF of ceramic capacitance and 1-µF high frequency ceramic bypass capacitors are required. A 1-μF, 16-V X6S size 0402 ceramic capacitor on VIN pin 10 and pin 21 is required. A 1-μF 16-V X6S ceramic capacitor on the bottom layer is recommended for high current applications. The high frequency bypass capacitor minimizes high frequency voltage overshoot across the power-stage. The ceramic capacitors must be a high-quality dielectric of X6S or better for their high capacitance-to-volume ratio and stable characteristics across temperature. In addition to this, more bulk capacitance can be needed on the input depending on the application to minimize variations on the input voltage during transient conditions.

The input capacitance required to meet a specific input ripple target can be calculated with Equation 25. A recommended target input voltage ripple is 5% the minimum input voltage, which is 400 mV in this example. The calculated input capacitance needed is 6.84 μF and four 22-µF ceramic capacitors are recommended for this example.

Equation 25.

The capacitor must also have an RMS current rating greater than the maximum input RMS current in the application. The input RMS current the input capacitors must support is calculated by Equation 26 and is 6.625 A in this example. The ceramic input capacitors have a current rating greater than this.

Equation 26.

For applications requiring bulk capacitance on the input, such as ones with low input voltage and high current, the selection process in this article is recommended.