SLVSEQ0A May   2019  – March 2020 TPS54A24

PRODUCTION DATA.  

  1. Features
  2. Applications
    1.     Simplified Schematic
  3. Description
    1.     Efficiency (VIN = 12 V, fSW = 500 kHz)
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Continuous Conduction Mode Operation (CCM)
      3. 7.3.3  VIN Pins and VIN UVLO
      4. 7.3.4  Voltage Reference and Adjusting the Output Voltage
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjustable UVLO
      7. 7.3.7  Soft Start and Tracking
      8. 7.3.8  Safe Start-Up Into Prebiased Outputs
      9. 7.3.9  Power Good
      10. 7.3.10 Sequencing (SS/TRK)
      11. 7.3.11 Adjustable Switching Frequency (RT Mode)
      12. 7.3.12 Synchronization (CLK Mode)
      13. 7.3.13 Bootstrap Voltage and 100% Duty Cycle Operation (BOOT)
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Overcurrent Protection
        1. 7.3.15.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.15.2 Low-Side MOSFET Overcurrent Protection
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Output Voltage Resistors Selection
        7. 8.2.2.7  Soft-Start Capacitor Selection
        8. 8.2.2.8  Undervoltage Lockout Setpoint
        9. 8.2.2.9  Bootstrap Capacitor Selection
        10. 8.2.2.10 PGOOD Pullup Resistor
        11. 8.2.2.11 Compensation
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

RTW Package
24-Pin WQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
AGND 1 Ground of internal analog circuitry. AGND must be connected to PGND for proper operation. Connect to PGND in a region outside of the critical switching loop.
VIN 2, 3, 16, 17 I Input voltage supply pin. Power for the internal circuit and the connection to drain of high-side MOSFET. Connect both pins to the input power source with a low impedance connection. Connect both pins and their neighboring PGND pins.
PGND 4, 5, 6, 7, 12, 13, 14, 15 Ground return for low-side power MOSFET and its drivers.
SW 8, 9, 10, 11 O Switching node. Connected to the source of the high-side MOSFET and drain of the low-side MOSFET.
BOOT 18 I Floating supply voltage for high-side MOSFET gate drive circuit. Connect a 0.1-µF ceramic capacitor between BOOT and SW pins.
PGOOD 19 O Open-drain power good indicator. It is asserted low if output voltage is outside if the PGOOD thresholds, VIN is low, EN is low, device is in thermal shutdown or device is in soft start.
EN 20 I Enable pin. Float or pull high to enable the device. Connect a resistor divider to this pin to implement adjustable under voltage lockout and hysteresis.
SS/TRK 21 I Soft-start and tracking pin. Connecting an external capacitor sets the soft-start time. This pin can also be used for tracking and sequencing.
COMP 22 I Error amplifier output and input to the PWM modulator. Connect loop compensation to this pin.
FB 23 I Converter feedback input. Connect to the output voltage with a resistor divider.
RT/CLK 24 I Switching frequency setting pin. In RT mode, an external timing resistor adjusts the switching frequency. In CLK mode, the device synchronizes to an external clock input to this pin.
Thermal PAD Exposed thermal pad. Connect to PGND pins and to internal ground planes using multiple vias for good thermal performance.