SLVSES4D
September 2019 – June 2024
TPS54J060
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Enable and Internal LDO
6.3.2
Split Rail and External LDO
6.3.3
Output Voltage Setting
6.3.4
Soft Start and Output-Voltage Tracking
6.3.5
Frequency and Operation Mode Selection
6.3.6
D-CAP3™ Control Mode
6.3.7
Current Sense and Positive Overcurrent Protection
6.3.8
Low-side FET Negative Current Limit
6.3.9
Power Good
6.3.10
Overvoltage and Undervoltage Protection
6.3.11
Out-Of-Bounds Operation (OOB)
6.3.12
Output Voltage Discharge
6.3.13
UVLO Protection
6.3.14
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Auto-Skip Eco-Mode Light Load Operation
6.4.2
Forced Continuous-Conduction Mode
6.4.3
Pre-Bias Start-up
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Choose the Switching Frequency and Operation Mode (MODE Pin)
7.2.2.2
Choose the Output Inductor (L)
7.2.2.3
Set the Current Limit (TRIP)
7.2.2.4
Choose the Output Capacitors (COUT)
7.2.2.5
Choose the Input Capacitors (CIN)
7.2.2.6
Feedback Network (FB Pin)
7.2.2.7
Soft Start Capacitor (SS/REFIN Pin)
7.2.2.8
EN Pin Resistor Divider
7.2.2.9
VCC Bypass Capacitor
7.2.2.10
BOOT Capacitor
7.2.2.11
Series BOOT Resistor and RC Snubber
7.2.2.12
PGOOD Pullup Resistor
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Ordering Information
Package Options
Mechanical Data (Package|Pins)
RPG|14
MPQF521
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvses4d_oa
slvses4d_pm
5.6
Typical Characteristics
Figure 5-1
High-Side FET RdsON
Figure 5-3
Overcurrent Limit
Figure 5-5
Enable Voltage
Figure 5-7
VIN UVLO
Figure 5-9
PGOOD Thresholds
Figure 5-11
Zero Crossing Threshold
Figure 5-13
Non-Switching Supply Current
V
OUT
= 1.2 V
L = 1 µH
MODE = FCCM
Figure 5-15
600-kHz Switching Frequency vs Load Current
V
OUT
= 2.5 V
L = 0.47 µH
MODE = FCCM
Figure 5-17
2200-kHz Switching Frequency vs Load Current
Figure 5-2
Low-Side FET RdsON
Figure 5-4
Negative Overcurrent Limit
Figure 5-6
Vref
Figure 5-8
VCC UVLO
Figure 5-10
PGOOD Sink Current
Figure 5-12
Soft-Start Sourcing Current
Figure 5-14
Shutdown Supply Current
V
OUT
= 1.2 V
L = 1 µH
MODE = FCCM
Figure 5-16
1100-kHz Switching Frequency vs Load Current
V
OUT
= 1.2 V
L = 1 µH
MODE = DCM
Figure 5-18
1100-kHz Switching Frequency vs Load Current – DCM