SLVSD46A November   2017  – December 2021 TPS55160-Q1 , TPS55162-Q1 , TPS55165-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics — External Components
    6. 7.6  Electrical Characteristics — Supply Voltage (VINP, VINL pins)
    7. 7.7  Electrical Characteristics — Reference Voltage (VOS_FB Pin) and Output Voltage (VOUT Pin)
    8. 7.8  Electrical Characteristics — Buck-Boost
    9. 7.9  Electrical Characteristics — Undervoltage and Overvoltage Lockout
    10. 7.10 Electrical Characteristics — IGN Wakeup
    11. 7.11 Electrical Characteristics — Logic Pins PS, IGN_PWRL, SS_EN
    12. 7.12 Electrical Characteristics – Overtemperature Protection
    13. 7.13 Electrical Characteristics – Power Good
    14. 7.14 Switching Characteristics — Reference Voltage (VOS_FB Pin) and Output Voltage (VOUT Pin)
    15. 7.15 Switching Characteristics — Buck-Boost
    16. 7.16 Switching Characteristics — Undervoltage and Overvoltage Lockout
    17. 7.17 Switching Characteristics — IGN Wakeup
    18. 7.18 Switching Characteristics — Logic Pins PS, IGN_PWRL, SS_EN
    19. 7.19 Switching Characteristics – Power Good
    20. 7.20 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Spread-Spectrum Feature
      2. 8.3.2 Overcurrent Protection
      3. 8.3.3 Overtemperature Protection
      4. 8.3.4 Undervoltage Lockout and Minimum Start-Up Voltage
      5. 8.3.5 Overvoltage Lockout
      6. 8.3.6 VOUT Overvoltage Protection
      7. 8.3.7 Power-Good Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 Modes of Operation
        1. 8.4.2.1 Normal Mode
        2. 8.4.2.2 Low-Power Mode
      3. 8.4.3 Power-Up and Power-Down Sequences
      4. 8.4.4 Soft-Start Feature
      5. 8.4.5 Pulldown Resistor on VOUT
      6. 8.4.6 Output Voltage Selection
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Application Circuits for Output Voltage Configurations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power-Circuit Selections: CIN, L, COUT
          1. 9.2.2.1.1 Inductor Current in Step-Down Mode
          2. 9.2.2.1.2 Inductor Current in Step-Up Mode
          3. 9.2.2.1.3 Inductor Current in Buck-Boost Overlap Mode
          4. 9.2.2.1.4 Inductor Peak Current
        2. 9.2.2.2 Control-Circuit Selections
          1. 9.2.2.2.1 Bootstrap Capacitors
          2. 9.2.2.2.2 VOUT-Sense Bypass Capacitor
          3. 9.2.2.2.3 VREG Bypass Capacitor
          4. 9.2.2.2.4 PG Pullup Resistor and Delay Time
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.8 Electrical Characteristics — Buck-Boost

Over operating free air temperature range –40°C ≤ TA ≤ 125°C and maximum junction temperature TJ = 150°C and recommended operating input supply range (unless otherwise noted)(1)
POSPARAMETERTEST CONDITIONSMINTYPMAXUNIT
3.1aIOUT_5VMax output current in normal operation for VOUT in 5-V settingTPS55165-Q1 with VOS_FB pin connected to GND6 V ≤ VIN; DCR ≤ 40 mΩ1A
3.1b3.8 V ≤ VIN ≤ 6 V; DCR ≤ 40 mΩ800mA
3.1c2.3 V ≤ VIN < 3.8 V; DCR ≤ 40 mΩ400
3.1d2 V ≤ VIN < 2.3 V; DCR ≤ 40 mΩ200
3.1eIOUT_12VMax output current in normal operation for VOUT in 12-V settingTPS55165-Q1 with VOS_FB pin connected to VREG14 V ≤ VIN; DCR ≤ 40 mΩ800mA
3.1f9.2 V≤ VIN ≤ 14 V; DCR ≤ 40 mΩ600
3.1g5.6 V≤ VIN < 9.2 V; DCR ≤ 40 mΩ300
3.1h4 V ≤ VIN < 5.6 V; DCR ≤ 40 mΩ150
3.2aIOUT_adj_VoutHMax output current in normal operation for adjustable configuration, 8V < VOUT ≤ 9VTPS55160-Q1 and TPS55162-Q1,
8V < VOUT ≤ 9V		(VOUT + 2V)  ≤ VIN; DCR ≤ 40 mΩ800
3.2b0.76 * VOUT ≤ VIN ≤ (VOUT + 2V); DCR ≤ 40 mΩ600mA
3.2c0.46 * VOUT ≤ VIN < 0.76 * VOUT; DCR ≤ 40 mΩ300mA
3.2d3.6 V ≤ VIN < 0.46 * VOUT; DCR ≤ 40 mΩ150mA
3.2eIOUT_adj_VoutLMax output current in normal operation for adjustable configuration, 5.7V ≤ VOUT ≤ 8VTPS55160-Q1 and TPS55162-Q1,
5.7V ≤ VOUT ≤ 8V		(VOUT + 1V)  ≤ VIN; DCR ≤ 40 mΩ800mA
3.2f0.76 * VOUT ≤ VIN < (VOUT + 1V); DCR ≤ 40 mΩ600
3.2g3.6 V ≤ VIN < 0.76 * VOUT; DCR ≤ 40 mΩ300
3.11IOUT_PSMax output current in low-power mode50
3.3Rdson_ BUCK_HSOn-resistance buck-stage high-side (HS) FET150300mΩ
3.4Rdson_ BUCK_LSOn-resistance buck-stage low-side (LS) FET150300mΩ
3.5Rdson_ BOOST_HSOn-resistance boost-stage HS FET150300mΩ
3.6Rdson_ BOOST_LSOn-resistance boost-stage LS FET150300mΩ
3.7ISW_limitPeak current limit for HS buck, LS buck, and LS boostDevice in normal operating mode23.54.5A
3.9ICoilAvglimitAverage coil current limitDevice in normal operating mode; L = 4.7 µH22.8A
3.20aVTLDSR_5V_100Transient load step response for VOUT in 5-V settingTPS55165-Q1: Measured at VOUT_SENSE pin; VOS_FB pin connected to GND; VIN = 12 V, IOUT = 0.1 A to 0.5 A, TR = TF =  1 µs, COUT = 47 µF5
3.20bVTLDSR_5V_500Transient load step response for VOUT in 5-V settingTPS55165-Q1: Measured at VOUT_SENSE pin; VOS_FB pin connected to GND; VIN = 12 V, IOUT = 0.5 A to 1 A, TR = TF =  1 µs, COUT = 47 µF5
3.21aVRIPPLE_5VOutput ripple for VOUT in 5-V settingTPS55165-Q1: Measured at VOUT_SENSE pin; VOS_FB pin connected to GND; VIN = 12V, IOUT = 1 A, SS_EN = low5.5mVpp
3.21bVRIPPLE_12VOutput ripple for VOUT in 12-V settingTPS55165-Q1: Measured at VOUT_SENSE pin; VOS_FB pin connected to VREG; VIN = 14V, IOUT = 0.8 A, SS_EN = low5mVpp
(1) The term VIN refers to the voltage on all supply pins VINP and VINL (unless otherwise noted).