SLVSHW7 May   2024 TPS55189-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  VCC Power Supply
      2. 6.3.2  EXTVCC Power Supply
      3. 6.3.3  I2C Address Selection
      4. 6.3.4  Input Undervoltage Lockout
      5. 6.3.5  Enable and Programmable UVLO
      6. 6.3.6  Soft Start
      7. 6.3.7  Shutdown and Load Discharge
      8. 6.3.8  Switching Frequency
      9. 6.3.9  Switching Frequency Dithering
      10. 6.3.10 Inductor Current Limit
      11. 6.3.11 Internal Charge Path
      12. 6.3.12 Output Voltage Setting
      13. 6.3.13 Output Current Monitoring and Cable Voltage Droop Compensation
      14. 6.3.14 Output Current Limit
      15. 6.3.15 Overvoltage Protection
      16. 6.3.16 Output Short Circuit Protection
      17. 6.3.17 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 PWM Mode
      2. 6.4.2 Power Save Mode
    5. 6.5 Programming
      1. 6.5.1 Data Validity
      2. 6.5.2 START and STOP Conditions
      3. 6.5.3 Byte Format
      4. 6.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 6.5.5 target Address and Data Direction Bit
      6. 6.5.6 Single Read and Write
      7. 6.5.7 Multi-Read and Multi-Write
  8. 7 Register Maps
    1. 7.1 REF Register (Address = 0h, 1h) [reset = 10100100b, 00000001b]
    2. 7.2 IOUT_LIMIT Register (Address = 2h) [reset = 11100100b]
    3. 7.3 VOUT_SR Register (Address = 3h) [reset = 00000001b]
    4. 7.4 VOUT_FS Register (Address = 4h) [reset = 00000011b]
    5. 7.5 CDC Register (Address = 5h) [reset = 11100000b]
    6. 7.6 MODE Register (Address = 6h) [reset = 00100000b]
    7. 7.7 STATUS Register (Address = 7h) [reset = 00000011b]
    8. 7.8 Register Summary
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Setting
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Output Current Limit
        7. 8.2.2.7 Loop Stability
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RYQ|21
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

TJ = -40°C to 125°C, VIN = 12 V and VOUT = 20 V. Typical values are at TJ = 25°C, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER SUPPLY
VINInput voltage range3.0

27

V
VVIN_UVLOUnder voltage lockout thresholdVIN rising2.82.93.0V
VIN falling2.62.652.7V
IQQuiescent current into VIN pinIC enabled, no load, no switching. VIN = 3.0V to 24V, VOUT = 0.8V, VFB = VREF + 0.1V, RFSW = 100kΩ760860µA
Quiescent current into VOUT pinIC enabled, no load, no switching. VIN = 3.0V, VOUT = 3V to 20V, VFB = VREF + 0.1V, RFSW = 100kΩ760860µA
ISDShutdown current into VIN pinIC disabled, VIN = 3.0V to 14V, TJ up to 125°C, EXTVCC pin floating0.83µA
VCCInternal regulator outputIVCC = 50mA, VIN = 8V, VOUT = 20V5.05.25.4V
EN/UVLO
VEN_HEN Logic high thresholdVCC = 3.0V to 5.5V1.15V
VEN_LEN Logic low thresholdVCC = 3.0V to 5.5V0.4V
VEN_HYSEnable threshold hysteresisVCC = 3.0V to 5.5V0.04V
VUVLOUVLO rising threshold at the EN/UVLO pinVCC = 3.0V to 5.5V1.201.231.26V
VUVLO_HYSUVLO threshold hysteresisVCC = 3.0V to 5.5V10mV
IUVLOSourcing current at the EN/UVLO pinVEN/UVLO = 1.3V4.455.6µA
OUTPUT
VOUTOutput voltage range0.822V
VOVPOutput overvoltage protection threshold22.523.524.5V
VOVP_HYSOvervoltage protection hysteresis1V
IFB_LKGLeakage current at FB pinTJ up to 125°C100nA
IVOUT_LKGLeakage current into VOUT pinIC disabled, VOUT = 20V, VSW2 = 0V, TJ up to 125°C120µA
IDISCHGOutput discharge currentVOUT = 20V, VCC = 5.2V40100170mA
INTERNAL REFERENCE DAC
VOUT_FULLOutput voltage when VREF is set to 1.129VVOUT_FS = 03h, REF = 0780h, VREF = 1.129V19.72020.3V
VOUT_FS = 02h, REF = 0780h, VREF = 1.129V14.781515.22V
VOUT_FS = 01h, REF = 0780h, VREF = 1.129V9.851010.15V
VOUT_FS = 00h, REF = 0780h, VREF = 1.129V4.9355.07V
VOUT_ZEROOutput voltage when VREF is set to 45mVVOUT_FS = 03h, REF = 0000h, VREF = 45mV0.740.80.86V
VOUT_FS = 02h, REF = 0000h, VREF = 45mV0.550.60.65V
VOUT_FS = 01h, REF = 0000h, VREF = 45mV0.360.40.44V
VOUT_FS = 00h, REF = 0000h, VREF = 45mV0.180.20.22V
REFERENCE VOLTAGE
VREFReference voltage at the FB/INT pin when using external feedbackExternal feedback with REF = 0780h1.1171.1291.141V
External feedback with REF = 058Ch0.8370.8460.855V
External feedback with REF = 0334h0.5020.5080.514V
External feedback with REF = 01A4h0.2760.2820.288V
POWER SWITCH
RDS(on)Low-side MOSFET on resistance at buck sideVOUT = 20V, VCC = 5.2V22mΩ
High-side MOSFET on resistance at buck sideVOUT = 20V, VCC = 5.2V14mΩ
Low-side MOSFET on resistance at boost sideVOUT = 20V, VCC = 5.2V11mΩ
High-side MOSFET on resistance at boost sideVOUT = 20V, VCC = 5.2V11mΩ
INTERNAL CLOCK
fSWSwitching frequencyRFSW = 100k180200220kHz
RFSW = 8.4k200022002400kHz
tOFF_minMinimum off timeBoost mode90145ns
tON_minMinimum on timeBuck mode90130ns
VSWVoltage at the FSW pin1V
CURRENT LIMIT
ILIM_AVGAverage inductor current limitVIN = 8V, VOUT = 20V, FSW = 400kHz789A
ILIM_PK_HPeak inductor current limit at boost high sideVIN = 8V, VOUT = 20V, FSW = 400kHz13A
ILIM_PK_LPeak inductor current limit at boost low sideVIN = 8V, VOUT = 20V, FSW = 400kHz12A
VSNSCurrent loop regulation voltage between ISP and ISN pinVISN = 2V to 21V, IOUT_LIMIT Register = 10111100b28.53031.5mV
VISN = 2V to 21V, IOUT_LIMIT Register = 11100100b485052mV
CABLE VOLTAGE DROOP COMPENSATION
VCDCVoltage at the CDC pinRCDC = 20kΩ or floating, VISP – VISN = 50mV0.9511.05V
RCDC = 20kΩ or floating, VISP – VISN = 2mV4075mV
VOUT_CDCVOUT increase for cable droop compensationInternal output feedback, CDC[2:0] = 111, VISP – VISN = 50mV640700750mV
Internal output feedback, CDC[2:0] = 111, VISP – VISN = 2mV3060mV
Internal output feedback, CDC[2:0] = 001, VISP – VISN = 50mV70100130mV
Internal output feedback, CDC[2:0] = 001, VISP – VISN = 10mV2040mV
IFB_CDCFB/INT  pin sinking currentExternal output feedback, RCDC = 20kΩ, VISP – VISN = 50mV7.237.57.87µA
External output feedback, RCDC = 20kΩ, VISP – VISN = 0mV00.3µA
External output feedback, RCDC = floating, VISP – VISN = 50mV00.3µA
ERROR AMPLIFIER
ISINKCOMP pin sink currentVFB = VREF + 400mV, VCOMP = 1.5V, VCC=5V20µA
ISOURCECOMP pin source currentVFB = VREF - 400mV, VCOMP = 1.5V, VCC=5V60µA
VCCLPHHigh clamp voltage at the COMP pinFPWM mode, VOUT = 1.8V to 22V1.3V
VCCLPLLow clamp voltage at the COMP pinFPWM mode, VOUT = 1.8V to 22V0.7V
GEAError amplifier transconductance190µA/V
SOFT START
tSSSoft-start time2.53.65ms
SPREAD SPECTRUM
IDITH_CHGDithering charge currentVDITH/SYNC = 1.0V, RFSW = 49.9kΩ, voltage rising from 0.9V2µA
IDITH_DISDithering discharge currentVDITH/SYNC = 1.0V, RFSW = 49.9kΩ, voltage falling from 1.1V2µA
VDITH_HDithering high threshold1.07V
VDITH_LDithering low threshold0.93V
SYNCHRONOUS CLOCK
VSNYC_HSync clock high voltage threshold1.2V
VSYNC_LSync clock low voltage threshold0.4V
tSYNC_MINMinimum sync clock pulse width50ns
HICCUP
tHICCUPHiccup off time76ms
MODE  
VMODEMODE logic high  thresholdVCC = 3.0V to 5.5V1.2V
VMODEMODE logic low  thresholdVCC = 3.0V to 5.5V0.4V
EXTVCC
VEXTVCCEXTVCC Logic high thresholdVCC = 3.0V to 5.5V1.2V
VEXTVCCEXTVCC Logic Low thresholdVCC = 3.0V to 5.5V0.4V
LOGIC INTERFACE
VI2C_IOIO voltage range for I2C1.75.5V
VI2C_HI2C input high thresholdVCC = 3.0V to 5.5V1.2V
VI2C_LI2C input low thresholdVCC = 3.0V to 5.5V0.4V
IFB/INT_HLeakage current into FB/INT pin when outputting high impedanceVFB/INT = 5V100nA
VFB/INT_LOutput low voltage range of the FB/INT pinSinking 4mA current0.030.1V
PROTECTION
TSDThermal shutdown thresholdTJ rising175°C
TSD_HYSThermal shutdown hysteresisTJ falling below Tsd20°C