SLVSFQ7A December   2020  – December 2021 TPS55288-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VCC Power Supply
      2. 7.3.2  Operation Mode Setting
      3. 7.3.3  Input Undervoltage Lockout
      4. 7.3.4  Enable and Programmable UVLO
      5. 7.3.5  Soft Start
      6. 7.3.6  Shutdown and Load Discharge
      7. 7.3.7  Switching Frequency
      8. 7.3.8  Switching Frequency Dithering
      9. 7.3.9  Inductor Current Limit
      10. 7.3.10 Internal Charge Path
      11. 7.3.11 Output Voltage Setting
      12. 7.3.12 Output Current Monitoring and Cable Voltage Droop Compensation
      13. 7.3.13 Integrated Gate Drivers
      14. 7.3.14 Output Current Limit
      15. 7.3.15 Overvoltage Protection
      16. 7.3.16 Output Short Circuit Protection
      17. 7.3.17 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Mode
      2. 7.4.2 Power Save Mode
    5. 7.5 Programming
      1. 7.5.1 Data Validity
      2. 7.5.2 START and STOP Conditions
      3. 7.5.3 Byte Format
      4. 7.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 7.5.5 Slave Address and Data Direction Bit
      6. 7.5.6 Single Read and Write
      7. 7.5.7 Multi-Read and Multi-Write
    6. 7.6 Register Maps
      1. 7.6.1 REF Register (Address = 0h, 1h) [reset = 11010010h, 00000000h]
      2. 7.6.2 IOUT_LIMIT Register (Address = 2h) [reset = 11100100h]
      3. 7.6.3 VOUT_SR Register (Address = 3h) [reset = 00000001h]
      4. 7.6.4 VOUT_FS Register (Address = 4h) [reset = 00000011h]
      5. 7.6.5 CDC Register (Address = 5h) [reset = 11100000h]
      6. 7.6.6 MODE Register (Address = 6h) [reset = 00100000h]
      7. 7.6.7 STATUS Register (Address = 7h) [reset = 00000011h]
      8. 7.6.8 Register Summary
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Switching Frequency
        3. 8.2.2.3 Output Voltage Setting
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Input Capacitor
        6. 8.2.2.6 Output Capacitor
        7. 8.2.2.7 Output Current Limit
        8. 8.2.2.8 Loop Stability
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS55288-Q1 is a synchronous four-switch buck-boost converter capable of regulating the output voltage at, above, or below the input voltage. The TPS55288-Q1 operates over 2.7-V to 36-V wide input voltage and is capable of outputing 0.8-V to 22-V voltage to support a variety of applications.

The TPS55288-Q1 integrates two 16-A MOSFETs of the boost leg to balance the solution size and efficiency. With the programmable output voltage and output current limit through I2C interface, the TPS55288-Q1 is fully compliant to the USB PD specification. The TPS55288-Q1 is capable of delivering 100 W from 12-V input voltage.

The TPS55288-Q1 employs an average current-mode control scheme. The switching frequency is programmable from 200 kHz to 2.2 MHz by an external resistor and can be synchronized to an external clock. The TPS55288-Q1 also provides optional spread spectrum to minimize peak EMI.

The TPS55288-Q1 offers output over-voltage protection, average inductor current limit, cycle-by-cycle peak current limit and output short circuit protection. The TPS55288-Q1 also ensures safe operating with optional output current limit and hiccup-mode protection in sustained overload conditions.

The TPS55288-Q1 can use a small inductor and small capacitors with high switching frequency. It is available in a 4.0-mm × 3.5-mm QFN package.

Device Information
PART NUMBERPACKAGE(1)BODY SIZE
TPS55288-Q1VQFN-HR4.00 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20200910-CA0I-S9CB-FWFV-1FCP7XMTKZRM-low.gif Typical Application Circuit