SLVSGT5
December 2023
TPS55289-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
I2C Timing Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
VCC Power Supply
6.3.2
EXTVCC Power Supply
6.3.3
I2C Address Selection
6.3.4
Input Undervoltage Lockout
6.3.5
Enable and Programmable UVLO
6.3.6
Soft Start
6.3.7
Shutdown and Load Discharge
6.3.8
Switching Frequency
6.3.9
Switching Frequency Dithering
6.3.10
Inductor Current Limit
6.3.11
Internal Charge Path
6.3.12
Output Voltage Setting
6.3.13
Output Current Monitoring and Cable Voltage Droop Compensation
6.3.14
Output Current Limit
6.3.15
Overvoltage Protection
6.3.16
Output Short Circuit Protection
6.3.17
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
PWM Mode
6.4.2
Power Save Mode
6.5
Programming
6.5.1
Data Validity
6.5.2
START and STOP Conditions
6.5.3
Byte Format
6.5.4
Acknowledge (ACK) and Not Acknowledge (NACK)
6.5.5
target Address and Data Direction Bit
6.5.6
Single Read and Write
6.5.7
Multi-Read and Multi-Write
7
Register Maps
7.1
REF Register (Address = 0h, 1h) [reset = 10100100b, 00000001b]
7.2
IOUT_LIMIT Register (Address = 2h) [reset = 11100100b]
7.3
VOUT_SR Register (Address = 3h) [reset = 00000001b]
7.4
VOUT_FS Register (Address = 4h) [reset = 00000011b]
7.5
CDC Register (Address = 5h) [reset = 11100000b]
7.6
MODE Register (Address = 6h) [reset = 00100000b]
7.7
STATUS Register (Address = 7h) [reset = 00000011b]
7.8
Register Summary
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Switching Frequency
8.2.2.2
Output Voltage Setting
8.2.2.3
Inductor Selection
8.2.2.4
Input Capacitor
8.2.2.5
Output Capacitor
8.2.2.6
Output Current Limit
8.2.2.7
Loop Stability
8.2.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Third-Party Products Disclaimer
9.1.2
Development Support
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RYQ|21
MPQF641
Thermal pad, mechanical data (Package|Pins)
RYQ|21
QFND727
Orderable Information
slvsgt5_oa
1
Features
AEC-Q100 qualified:
Device temperature grade 1: –40°C to +125°C ambient operating temperature range
Functional Safety-Capable
Documentation available to aid functional safety system design
Programmable power supply (PPS) support for USB power delivery (USB PD)
Wide input voltage range: 3.0V to 36V
Programmable output voltage range: 0.8V to 22V with 10mV step
±1% reference voltage accuracy
Adjustable output voltage compensation for voltage droop over the cable
Programmable output current limit up to 6.35A with 50mA step
±5% accurate output current monitoring
I
2
C interface
High efficiency over entire load range
96% efficiency at V
IN
= 12V, V
OUT
= 20V and I
OUT
= 3A
Programmable PFM and FPWM mode at light load
Avoid frequency interference and crosstalk
Optional clock synchronization
Programmable switching frequency from 200kHz to 2.2MHz
EMI mitigation
Optional programmable spread spectrum
Lead-less package
Rich protection features
Output overvoltage protection
Hiccup mode for output short-circuit protection
Thermal shutdown protection
8A average inductor current limit
Small solution size
Maximum switching frequency up to 2.2MHz
3.0mm × 5.0mm
HotRod™
QFN package