SLVSGT5 December   2023 TPS55289-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  VCC Power Supply
      2. 6.3.2  EXTVCC Power Supply
      3. 6.3.3  I2C Address Selection
      4. 6.3.4  Input Undervoltage Lockout
      5. 6.3.5  Enable and Programmable UVLO
      6. 6.3.6  Soft Start
      7. 6.3.7  Shutdown and Load Discharge
      8. 6.3.8  Switching Frequency
      9. 6.3.9  Switching Frequency Dithering
      10. 6.3.10 Inductor Current Limit
      11. 6.3.11 Internal Charge Path
      12. 6.3.12 Output Voltage Setting
      13. 6.3.13 Output Current Monitoring and Cable Voltage Droop Compensation
      14. 6.3.14 Output Current Limit
      15. 6.3.15 Overvoltage Protection
      16. 6.3.16 Output Short Circuit Protection
      17. 6.3.17 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 PWM Mode
      2. 6.4.2 Power Save Mode
    5. 6.5 Programming
      1. 6.5.1 Data Validity
      2. 6.5.2 START and STOP Conditions
      3. 6.5.3 Byte Format
      4. 6.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 6.5.5 target Address and Data Direction Bit
      6. 6.5.6 Single Read and Write
      7. 6.5.7 Multi-Read and Multi-Write
  8. 7 Register Maps
    1. 7.1 REF Register (Address = 0h, 1h) [reset = 10100100b, 00000001b]
    2. 7.2 IOUT_LIMIT Register (Address = 2h) [reset = 11100100b]
    3. 7.3 VOUT_SR Register (Address = 3h) [reset = 00000001b]
    4. 7.4 VOUT_FS Register (Address = 4h) [reset = 00000011b]
    5. 7.5 CDC Register (Address = 5h) [reset = 11100000b]
    6. 7.6 MODE Register (Address = 6h) [reset = 00100000b]
    7. 7.7 STATUS Register (Address = 7h) [reset = 00000011b]
    8. 7.8 Register Summary
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Setting
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Output Current Limit
        7. 8.2.2.7 Loop Stability
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1 REF Register (Address = 0h, 1h) [reset = 10100100b, 00000001b]

REF is shown in Figure 7-1 and Figure 7-2 described in Table 7-2.

Return to Summary Table.

REF sets the internal reference voltage of the TPS55289-Q1. The 01h register is the high byte and the 00h register is the low byte. One LSB of register 00h stands for 0.5645mV of the internal reference voltage. The default register value is 00000001 10100100b of 282mV. When the register value is 00000000 00000000b, the reference voltage is 45mV. When the register value is 00000111 10000000b, the reference voltage is 1.129V. The output voltage of the TPS55289-Q1 also depends on the output feedback ratio, which is either set in register 04h or set by an external resistor divider.

When using internal output voltage feedbcak divider, the output voltage VOUT is calculated by Equation 8

Equation 8. V O U T =   V R E F I N T F B

The REF register can be configured by an I2C controller before setting the OE bit in register 06h. For 5V output voltage, set the REF register value to 00000001 10100100b. To set the internal reference voltage, write the register 00h first, then write the register 01h.

Figure 7-1 REF_LSB
7 6 5 4 3 2 1 0
VREF
R/W-10100100b
Figure 7-2 REF_MSB
15 14 13 12 11 10 9 8
Reserved VREF
R-00000b R/W-001b
Table 7-2 REF Register Field Descriptions
Bit Field Type Reset Description
15-11 Reserved R 00000b Reserved
10-0 VREF R/W 001 10100100b Sets the internal reference voltage

000 00000000b = 45mV reference voltage

000 00000001b = 45.5645mV reference voltage

000 00000010b = 46.129mV reference voltage

...... = ......

001 10100100b = 282mV reference voltage (Default)

...... = ......

011 00110100b = 508mV reference voltage

...... = ......

101 10001100b = 846mV reference voltage

...... = ......

111 10000000b = 1129mV reference voltage

...... = ......

111 11111110b = 1200mV reference voltage