SLVSHR3 July   2024

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  VCC Power Supply
      2. 6.3.2  EXTVCC Power Supply
      3. 6.3.3  Input Undervoltage Lockout
      4. 6.3.4  Enable and Programmable UVLO
      5. 6.3.5  Soft Start
      6. 6.3.6  Shutdown
      7. 6.3.7  Switching Frequency
      8. 6.3.8  Switching Frequency Dithering
      9. 6.3.9  Inductor Current Limit
      10. 6.3.10 Internal Charge Path
      11. 6.3.11 Output Voltage Setting
      12. 6.3.12 Output Current Monitoring and Cable Voltage Droop Compensation
      13. 6.3.13 Output Current Limit
      14. 6.3.14 Overvoltage Protection
      15. 6.3.15 Output Short Circuit Protection
      16. 6.3.16 Power Good
      17. 6.3.17 Constant Current Output Indication
      18. 6.3.18 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 PWM Mode
      2. 6.4.2 Power Save Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Switching Frequency
        2. 7.2.2.2 Output Voltage Setting
        3. 7.2.2.3 Inductor Selection
        4. 7.2.2.4 Input Capacitor
        5. 7.2.2.5 Output Capacitor
        6. 7.2.2.6 Output Current Limit
        7. 7.2.2.7 Loop Stability
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

6.3.4 Enable and Programmable UVLO

The TPS551892-Q1 has a dual function enable and undervoltage lockout (UVLO) circuit. When the input voltage at the VIN pin is above the input UVLO rising threshold of 3V and the EN/UVLO pin is pulled above 1.15V but less than the enable UVLO threshold of 1.23V, the TPS551892-Q1 is enabled but still in standby mode. The TPS551892-Q1 starts to detect the MODE pin logic status.

The EN/UVLO pin has an accurate UVLO voltage threshold to support programmable input undervoltage lockout with hysteresis. When the EN/UVLO pin voltage is greater than the UVLO threshold of 1.23V, the TPS551892-Q1 is enabled for switching operation. A hysteresis current IUVLO_HYS is sourced out of the EN/UVLO pin to provide hysteresis that prevents on/off chattering in the presence of noise with a slowly changing input voltage.

By using resistor divider as shown in Figure 6-1, the turnon threshold is calculated using Equation 1.

Equation 1. TPS551892-Q1

where

  • VUVLO is the UVLO threshold of 1.23V at the EN/UVLO pin

The hysteresis between the UVLO turnon threshold and turnoff threshold is set by the upper resistor in the EN/UVLO resistor divider and is given by the Equation 2.

Equation 2. TPS551892-Q1

where

  • IUVLO_HYS is the sourcing current from the EN/UVLO pin when the voltage at the EN/UVLO pin is above VUVLO
TPS551892-Q1 Programmable UVLO With Resistor Divider at the EN/UVLO PinFigure 6-1 Programmable UVLO With Resistor Divider at the EN/UVLO Pin

Using an NMOSFET together with a resistor divider can implement both logic enable and programmable UVLO as shown in Figure 6-2. The EN logic high level must be greater than enable threshold plus the Vth of the NMOSFET Q1. The Q1 also eliminates the leakage current from VIN to ground through the UVLO resistor divider during shutdown mode.

TPS551892-Q1 Logic Enable and Programmable UVLOFigure 6-2 Logic Enable and Programmable UVLO