SLVSBV5C June   2014  – September 2021 TPS55340-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operation
      2. 7.3.2 Switching Frequency
      3. 7.3.3 Overcurrent Protection and Frequency Foldback
        1. 7.3.3.1 Minimum On Time and Pulse Skipping
      4. 7.3.4 Voltage Reference and Setting Output Voltage
      5. 7.3.5 Soft Start
      6. 7.3.6 Slope Compensation
      7. 7.3.7 Enable and Thermal Shutdown
      8. 7.3.8 Undervoltage Lockout (UVLO)
      9. 7.3.9 Thermal Considerations
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VI < 2.9 V (Minimum VI)
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Operation at Light Loads
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS55340-Q1 Boost Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency (R4)
          3. 8.2.1.2.3  Determining the Duty Cycle
          4. 8.2.1.2.4  Selecting the Inductor (L1)
          5. 8.2.1.2.5  Computing the Maximum Output Current
          6. 8.2.1.2.6  Selecting the Output Capacitor (C8 through C10)
          7. 8.2.1.2.7  Selecting the Input Capacitors (C2 and C7)
          8. 8.2.1.2.8  Setting the Output Voltage (R1 and R2)
          9. 8.2.1.2.9  Setting the Soft-Start Time (C7)
          10. 8.2.1.2.10 Selecting the Schottky Diode (D1)
          11. 8.2.1.2.11 Compensating the Control Loop (R3, C4, and C5)
        3. 8.2.1.3 Application Curves
      2. 8.2.2 TPS55340-Q1 SEPIC Converter
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1  Selecting the Switching Frequency (R4)
          2. 8.2.2.2.2  Duty Cycle
          3. 8.2.2.2.3  Selecting the Inductor (L1)
          4. 8.2.2.2.4  Calculating the Maximum Output Current
          5. 8.2.2.2.5  Selecting the Output Capacitor (C8 Through C10)
          6. 8.2.2.2.6  Selecting the Series Capacitor (C6)
          7. 8.2.2.2.7  Selecting the Input Capacitor (C2 and C7)
          8. 8.2.2.2.8  Selecting the Schottky Diode (D1)
          9. 8.2.2.2.9  Setting the Output Voltage (R1 and R2)
          10. 8.2.2.2.10 Setting the Soft-Start Time (C3)
          11. 8.2.2.2.11 Mosfet Rating Considerations
          12. 8.2.2.2.12 Compensating the Control Loop (R3 and C4)
        3. 8.2.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Overcurrent Protection and Frequency Foldback

The TPS55340-Q1 device provides cycle-by-cycle overcurrent protection that turns off the power switch when the inductor current reaches the overcurrent limit threshold. The PWM circuitry resets at the beginning of the next switch cycle. During an overcurrent event, the output voltage begins to droop as a function of the load on the output. When the FB voltage through the feedback resistors, drops lower than 0.9 V, the switching frequency is automatically reduced to 1/4 of the normal value. Figure 6-9 shows the non-foldback frequency with an 80-kΩ timing resistor and the corresponding foldback frequency. The switching frequency does not return to normal until the overcurrent condition is removed and the FB voltage increases above 0.9 V. The frequency foldback feature is disabled during soft start.