SLVSCW4B April   2016  – May 2019 TPS560200-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive On-Time Control
      3. 7.3.3 Advanced Auto-Skip Eco-Mode Control
      4. 7.3.4 Soft-Start and Prebiased Soft-Start
      5. 7.3.5 Current Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Eco-Mode Operation
      3. 7.4.3 Standby Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS560200-Q1 is an 17-V, 500-mA, low-Iq, adaptive on-time D-CAP2 mode synchronous monolithic buck converter with integrated MOSFETs in easy-to-use 8-pin MSOP package.

The TPS560200-Q1 lets system designers complete the suite of various end-equipment power bus regulators with a cost-effective, low component count and low standby current solution. The main control loop for the device uses the D-CAP2 mode control that provides a fast transient response with no external compensation components. The adaptive on-time control supports seamless transition between PWM mode at higher load conditions and advanced Eco-Mode operation at light loads.

The TPS560200-Q1 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 17-V VIN input. The output voltage can be programmed between 0.8 V and 6.5 V. The device also features a fixed 2-ms soft-start time. The device is available in the 8-pin MSOP package.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS560200-Q1 VSSOP (8) 3.00 mm x 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.