SLUSAH5D MARCH   2011  – February 2016 TPS56221

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Voltage Reference
      2. 7.3.2  Enable Functionality, Start-Up, Sequence, and Timing
        1. 7.3.2.1 COMP Pin Impedance Sensing
        2. 7.3.2.2 Overcurrent Protection (OCP) Setting
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Oscillator
      5. 7.3.5  Overcurrent Protection (OCP)
      6. 7.3.6  Switching Node (SW)
      7. 7.3.7  Input Undervoltage Lockout (UVLO)
      8. 7.3.8  Prebias Start-Up
      9. 7.3.9  Power Good
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency Selection
        2. 8.2.2.2  Inductor Selection
        3. 8.2.2.3  Output Capacitor Selection
        4. 8.2.2.4  Inductor Peak Current Rating
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  Boot-Strap Capacitor (C14)
        7. 8.2.2.7  Boot-Strap Resistor (R2)
          1. 8.2.2.7.1 RC Snubber (R9 and C18)
        8. 8.2.2.8  VDD Bypass Capacitor (C11)
        9. 8.2.2.9  BP5 Bypass Capacitor (C12)
        10. 8.2.2.10 Soft-Start Capacitor (C13)
        11. 8.2.2.11 Current Limit (R1)
        12. 8.2.2.12 Feedback Divider (R4, R7)
        13. 8.2.2.13 Compensation (C15, C16, C17, R3, R6)
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DQP|22
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • Place input capacitors next to the VIN pin and on the same side as the device. Use wide and short traces or copper planes for the connection from the VIN pin to the input capacitor and from the input capacitor to the power pad of the device.
  • Place the BP decoupling capacitor close to the BP pin and on the same side as the device in order to avoid the use of vias. Use wide and short traces for the connection from the BP pin to the capacitor and from the capacitor to the power pad. If vias are not evitable, use at least three vias to reduce the parasitic inductance.
  • Include a Kelvin VDD connection, or separate from VIN connection (bypass input capacitors); add a placeholder for a filter resistor between the VDD pin and the input bus. Place the VDD decoupling capacitor near the VDD pin and on the same side as the device to avoid the use of vias. Use wide and short traces for the connection from the VDD pin to the capacitor and from the capacitor to the power pad of the device. If vias are not avoidable, use at least three vias to reduce the parasitic inductance.
  • Maintain the FB trace away from BOOT and SW traces.
  • Minimize the area of switch node.
  • Use a single ground. Do not use separate signal and power ground.
  • Use 3 × 7 thermal vias as suggested in Land Pattern Data in Mechanical, Packaging, and Orderable Information.

10.2 Layout Example

The TPS56221EVM layout is shown in Figure 25 through Figure 30 for reference.

TPS56221 deq_layout_lusah5.gif Figure 25. TPS56221EVM Top Assembly Drawing (Top view)
TPS56221 deq_layout3_lusah5.gif Figure 27. TPS56221EVM Top Copper (Top View)
TPS56221 deq_layout5_lusah5.gif Figure 29. TPS56221EVM Internal 2 (Top View)
TPS56221 deq_layout2_lusah5.gif Figure 26. TPS56221EVM Bottom Assembly Drawing (Bottom view)
TPS56221 deq_layout4_lusah5.gif Figure 28. TPS56221EVM Internal 1 (Top View)
TPS56221 deq_layout6_lusah5.gif Figure 30. TPS56221EVM Bottom Copper (Top View)