SLVSEW1B April 2019 – April 2019 TPS566235
PRODUCTION DATA.
The Power Good (PG) pin is an open drain output. Once the FB pin voltage is between 90% and 110% of the internal reference voltage (VREF=0.6V), the PG is de-asserted and floats after a 160 µs de-glitch time. A pull-up resistor of 100 kΩ is recommended to pull it up to VCC. The PG pin is pulled low when the FB pin voltage is lower than 85% or greater than 115% threshold or in an event of thermal shutdown or during the soft-start period. PG de-glitch time (from high to low) is 32 µs.