SLVSHH7A January 2024 – June 2024 TPS56837H
PRODUCTION DATA
The TPS56837H and TPS56837HA have built-in power-good (PG) function to indicate whether the output voltage has reached the appropriate level or not. The PG signal can be used for start-up sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor (to any voltage below 5.5V). TI recommends a pullup resistor of 100kΩ to pull up to 5V voltage. The PG pin can sink 10mA of current and maintain the specified logic low level. After the FB pin voltage is between 90% and 110% of the internal reference voltage (VREF) and after a deglitch time of 64µs, the PG turns to high impedance status. The PG pin is pulled low after a deglitch time of 32µs when FB pin voltage is lower than 85% of the internal reference voltage or greater than 115% of the internal reference voltage, or in events of EN shutdown, UVLO conditions, and thermal shutdown. VIN must remain present for the PG pin to stay low as shown in Table 6-2.
Device State | PG Logic Status | ||
---|---|---|---|
High Impedance | Low | ||
Enable (EN = High) | 90% × VREF =< VFB <= 110% × VREF | √ | |
VFB < 85% × VREF or VFB > 115% × VREF | √ | ||
Shutdown (EN = Low) | √ | ||
UVLO | 2V < VIN < VUVLO | √ | |
Thermal shutdown | TJ > TSD | √ | |
Power supply removal | VIN < 2V | √ |