SLVSD05G March   2016  – August 2024 TPS56C215

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  PWM Operation and D-CAP3™ Control Mode
      2. 6.3.2  Eco-mode Control
      3. 6.3.3  4.7-V LDO
      4. 6.3.4  MODE Selection
      5. 6.3.5  Soft Start and Prebiased Soft Start
      6. 6.3.6  Enable and Adjustable UVLO
      7. 6.3.7  Power Good
      8. 6.3.8  Overcurrent Protection and Undervoltage Protection
      9. 6.3.9  UVLO Protection
      10. 6.3.10 Thermal Shutdown
      11. 6.3.11 Output Voltage Discharge
    4. 6.4 Device Functional Modes
      1. 6.4.1 Light Load Operation
      2. 6.4.2 Standby Operation
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 External Component Selection
          1. 7.2.2.1.1 Output Voltage Set Point
          2. 7.2.2.1.2 Switching Frequency and MODE Selection
          3. 7.2.2.1.3 Inductor Selection
          4. 7.2.2.1.4 Output Capacitor Selection
          5. 7.2.2.1.5 Input Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Marking

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

MODE Selection

The TPS56C215 has a MODE pin that can offer 12 different states of operation as a combination of current limit, switching frequency, and light load operation. The device can operate at two different current limits ILIM-1 and ILIM to support an output continuous current of 10 A and 12 A, respectively. The TPS56C215 is designed to compare the valley current of the inductor against the current limit thresholds so understand that the output current is half the ripple current higher than the valley current. For example, with the ILIM current limit selection, the OCL threshold is 11.73-A minimum, which means that a pk-pk inductor ripple current of 0.54-A minimum is needed to be able to draw 12 A out of the converter without entering an overcurrent condition. The TPS56C215 can operate at three different frequencies of 400 kHz, 800 kHz, and 1200 kHz and also can choose between Eco-mode and FCCM mode. The device reads the voltage on the MODE pin during start-up and latches onto one of the MODE options listed in Table 6-3. The voltage on the MODE pin can be set by connecting this pin to the center tap of a resistor divider connected between VREG5 and AGND. A guideline for the top resistor (RM_H) and the bottom resistor (RM_L) in 1% resistors is shown in Table 6-3. It is important that the voltage for the MODE pin is derived from the VREG5 rail only because internally this voltage is referenced to detect the MODE option. The MODE pin setting can be reset only by a VIN power cycling.

Table 6-3 MODE Pin Resistor Settings
RM_L (kΩ) RM_H (kΩ) LIGHT LOAD OPERATION CURRENT LIMIT FREQUENCY (kHz)
5.1300FCCMILIM-1400
10200FCCMILIM400
20160FCCMILIM-1800
20120FCCMILIM800
51200FCCMILIM-11200
51180FCCMILIM1200
51150DCMILIM-1400
51120DCMILIM400
5191DCMILIM-1800
5182DCMILIM800
5162DCMILIM-11200
5151DCMILIM1200

Figure 6-2 shows the typical start-up sequence of the device after the EN pin voltage crosses the EN turn-on threshold. After the voltage on VREG5 pin crosses the rising UVLO threshold, it takes 100 μs to read the first MODE setting and approximately 100 μs from there to finish the last MODE setting. The output voltage starts ramping after the MODE setting reading is completed.

TPS56C215 Power-Up SequenceFigure 6-2 Power-Up Sequence