SLUSDE4A August   2019  – August 2019 TPS56C230

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Efficiency vs Output Current Eco-mode
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  PWM Operation and D-CAP3 Control
      2. 7.3.2  Soft Start
      3. 7.3.3  Large Duty Operation
      4. 7.3.4  Power Good
      5. 7.3.5  Overcurrent Protection and Undervoltage Protection
      6. 7.3.6  Overvoltage Protection
      7. 7.3.7  Out-of-Bounds Operation
      8. 7.3.8  UVLO Protection
      9. 7.3.9  Output Voltage Discharge
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Light Load Operation
      2. 7.4.2 Eco-mode Control
      3. 7.4.3 Force CCM
      4. 7.4.4 Mode Selection
      5. 7.4.5 Standby Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Set Point
        3. 8.2.2.3 MODE Selection
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RJE|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) TPS56C230 UNIT
RJE (VQFN)
20 PINS
RθJA Junction-to-ambient thermal resistance (standard board) 42.3 °C/W
RθJA_effective Junction-to-ambient thermal resistance (4-layer custom board)(2) 28.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 26.2 °C/W
RθJB Junction-to-board thermal resistance 13 °C/W
ψJT Junction-to-top characterization parameter 1.3 °C/W
ψJB Junction-to-board characterization parameter 12.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 16.1 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.
(2) 70 mm x 70 mm, 4 layers, thickness: 1.5 mm. 2 oz. copper traces located on the top and bottom of the PCB. 4 thermal vias in the PowerPAD area under the device package.