SLVSDU5A
April 2018 – November 2019
TPS57112C-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
Efficiency vs Output Current
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Characteristics Curves
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fixed-Frequency PWM Control
7.3.2
Slope Compensation and Output Current
7.3.3
Bootstrap Voltage (BOOT) and Low-Dropout Operation
7.3.3.1
Error Amplifier
7.3.4
Voltage Reference
7.4
Device Functional Modes
7.4.1
Adjusting the Output Voltage
7.4.2
Enable Functionality and Adjusting Undervoltage Lockout
7.4.3
Slow-Start or Tracking Pin
7.4.4
Sequencing
7.4.5
Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
7.4.6
Overcurrent Protection
7.4.7
Frequency Shift
7.4.8
Reverse Overcurrent Protection
7.4.9
Synchronize Using the RT/CLK Pin
7.4.10
Power Good (PWRGD Pin)
7.4.11
Overvoltage Transient Protection
7.4.12
Thermal Shutdown
7.4.13
Small-Signal Model for Loop Response
7.4.14
Simple Small-Signal Model for Peak-Current-Mode Control
7.4.15
Small-Signal Model for Frequency Compensation
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Selecting the Switching Frequency
8.2.2.2
Output Inductor Selection
8.2.2.3
Output Capacitor
8.2.2.4
Input Capacitor
8.2.2.5
Slow-Start Capacitor
8.2.2.6
Bootstrap Capacitor Selection
8.2.2.7
Output Voltage and Feedback Resistor Selection
8.2.2.8
Compensation
8.2.2.9
Power-Dissipation Estimate
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.1.2
Development Support
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RTE|16
MPQF149D
Thermal pad, mechanical data (Package|Pins)
RTE|16
QFND290G
Orderable Information
slvsdu5a_oa
slvsdu5a_pm
8.2.3
Application Curves
Figure 35.
Efficiency versus Load Current
V
(VIN)
= 3.3 V
f
(SW)
= 1 MHz
T
A
= 25ºC
Figure 37.
Efficiency versus Load Current
1 MHz, 3.3 VIN, T
A
= 25°C
Figure 36.
Efficiency versus Load Current
V
(VIN)
= 5 V
f
(SW)
= 1 MHz
T
A
= 25ºC
Figure 38.
Efficiency versus Load Current
1 MHz, 5 VIN, T
A
= 25°C
Figure 39.
Power-Up V
O
, V
(VIN)
Figure 41.
Transient Response, 1.5-A Step
Figure 43.
Power-Up V
O
, EN
Figure 45.
Input Ripple, 2 A
Figure 47.
Load Regulation versus Load Current
Figure 40.
Power-Down V
O
, V
(VIN)
Figure 42.
Power-Up V
O
, V
(VIN)
Figure 44.
Output Ripple, 2 A
Figure 46.
Closed-Loop Response, V
(VIN)
(5 V), 2 A
I
O
= 2 A
Figure 48.
Regulation versus Input Voltage