10.1 Layout Guidelines

Layout is a critical portion of good power-supply design. There are several signal paths that conduct fast-changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power-supply performance. Take care to minimize the loop area formed by the bypass capacitor connections and the VIN pins. See Figure 49 for a PCB layout example. Tie the GND pins and AGND pin directly to the thermal pad under the IC. Connect the thermal pad to any internal PCB ground planes using multiple vias directly under the IC. One can use additional vias to connect the top-side ground area to the internal planes near the input and output capacitors. For operation at full-rated load, the top-side ground area, along with any additional internal ground planes, must provide adequate heat dissipating area.

Locate the input bypass capacitor as close to the IC as possible. Route the PH pins to the output inductor. Because the PH connection is the switching node, locate the output inductor close to the PH pins, and minimize the area of the PCB conductor to prevent excessive capacitive coupling. Also locate the boot capacitor close to the device. Connect the sensitive analog ground connections for the following to a separate analog ground trace as shown:

• Feedback voltage divider
• Compensation components
• Slow-start capacitor
• Frequency-set resistor

The RT/CLK pin is particularly sensitive to noise, so locate the RT resistor as close as possible to the IC and route traces to minimize their lengths. One can place the additional external components approximately as shown. It may be possible to obtain acceptable performance with alternate PCB layouts. However, this layout, meant as a guideline, demonstrably produces good results.