SLVSDQ7B October 2016 – July 2021 TPS57114C-Q1
PRODUCTION DATA
The TPS57114C-Q1 device is a 6-V, 4-A, synchronous step-down (buck) converter with two integrated n-channel MOSFETs. To improve performance during line and load transients, the device implements a constant-frequency, peak-current-mode control which reduces output capacitance and simplifies external frequency-compensation design. The wide switching-frequency range of 200 kHz to 2000 kHz allows for efficiency and size optimization when selecting the output-filter components. Adjust the switching frequency using a resistor to ground on the RT/CLK pin. The device has an internal phase-lock loop (PLL) on the RT/CLK pin that synchronizes the power-switch turnon to the falling edge of an external system clock.
The TPS57114C-Q1 device has a typical default start-up voltage of 2.45 V. The EN pin has an internal pullup current source; to adjust the input-voltage undervoltage lockout (UVLO), use two external resistors on the EN pin. In addition, the pullup current provides a default condition, allowing the device to operate when the EN pin is floating. The total operating current for the TPS57114C-Q1 device is typically 515 µA when not switching and under no load. When the device is disabled, the typical supply current is less than 5.5 µA.
The integrated 12-mΩ MOSFETs allow for high-efficiency power-supply designs with continuous output currents up to 4 A.
The TPS57114C-Q1 device reduces the external component count by integrating the boot recharge diode. A capacitor between the BOOT and PH pins supplies the bias voltage for the integrated high-side MOSFET. A UVLO circuit, which monitors the boot-capacitor voltage, turns off the high-side MOSFET when the voltage falls below a preset threshold. This BOOT circuit allows the TPS57114C-Q1 device to operate approaching 100% duty cycle. The output voltage can be stepped down to as low as the 0.8-V reference.
The TPS57114C-Q1 device has a power-good comparator (PWRGD) with 2% hysteresis.
The TPS57114C-Q1 device minimizes excessive output overvoltage transients by taking advantage of the overvoltage power-good comparator. A regulated output voltage exceeding 109% of the nominal voltage activates the overvoltage comparator, which turns off the high-side MOSFET and masks it from turning on until the output voltage is lower than 107% of the nominal voltage.
The SS/TR (slow-start or tracking) pin minimizes inrush currents or provides power-supply sequencing during power up. Connect a small-value capacitor to the pin for slow start. Discharging the SS/TR pin before the output powers up ensures a repeatable restart after an overtemperature fault, UVLO fault, or disabled condition.
The use of a frequency-foldback circuit reduces the switching frequency during start-up and overcurrent fault conditions to help limit the inductor current.