SLVSD01B September   2015  – May 2019 TPS57140-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Efficiency vs Load Current
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope-Compensation Output Current
      3. 7.3.3  Bootstrap Voltage (Boot)
      4. 7.3.4  Low-Dropout Operation
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Voltage Reference
      7. 7.3.7  Adjusting the Output Voltage
      8. 7.3.8  Enable and Adjusting UVLO
      9. 7.3.9  Slow-Start or Tracking Pin (SS/TR)
      10. 7.3.10 Overload Recovery Circuit
      11. 7.3.11 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      12. 7.3.12 Overcurrent Protection and Frequency Shift
      13. 7.3.13 Selecting the Switching Frequency
      14. 7.3.14 How to Interface to RT/CLK Pin
      15. 7.3.15 Power Good (PWRGD Pin)
      16. 7.3.16 Overvoltage Transient Protection (OVTP)
      17. 7.3.17 Thermal Shutdown
      18. 7.3.18 Small-Signal Model for Loop Response
      19. 7.3.19 Simple Small-Signal Model for Peak-Current-Mode Control
      20. 7.3.20 Small-Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sequencing
      2. 7.4.2 Pulse-Skip Eco-mode Control Scheme
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Selecting the Switching Frequency
        2. 8.2.2.2  Output Inductor Selection (LO)
        3. 8.2.2.3  Output Capacitor
        4. 8.2.2.4  Catch Diode
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Slow-Start Capacitor
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  UVLO Set Point
        9. 8.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 8.2.2.10 Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power-Dissipation Estimate
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.5 Input Capacitor

The TPS57140-EP requires a high-quality ceramic, type X5R or X7R, input decoupling capacitor of at least 3 μF of effective capacitance, and in some applications a bulk capacitance. The effective capacitance includes any dc-bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple-current rating greater than the maximum input-current ripple of the TPS57140-EP. Calculate the input-ripple current using Equation 38.

The value of a ceramic capacitor varies significantly over temperature and the amount of dc bias applied to the capacitor. The designer can minimize the capacitance variations due to temperature by selecting a dielectric material that is stable over temperature. Designers usually select X5R and X7R ceramic dielectrics for power regulator capacitors because they have a high capacitance-to-volume ratio and are fairly stable over temperature. The designer must also take the dc bias into account for output capacitor selection. The capacitance value of a capacitor decreases as the dc bias across a capacitor increases.

This example design requires a ceramic capacitor with at least a 20-V voltage rating to support the maximum input voltage. Common standard ceramic capacitor voltage ratings include 4 V, 6.3 V, 10 V, 16 V, 25 V, 50 V, and 100 V, so select a 25-V capacitor. For this example, the selection is two 2.2-μF, 25-V capacitors in parallel. Table 2 shows a selection of high-voltage capacitors. The input capacitance value determines the input-voltage ripple of the regulator. Calculate the input-voltage ripple using Equation 39. Using the design example values, Ioutmax = 1.5 A, Cin = 4.4 μF, ƒSW = 1200 kHz, yields an input-voltage ripple of 71 mV and an RMS input-ripple current of 0.701 A.

Equation 38. TPS57140-EP eq40_lvs795.gif
Equation 39. TPS57140-EP eq41_lvs795.gif

Table 2. Capacitor Types

VENDOR VALUE (μF) EIA Size VOLTAGE DIELECTRIC COMMENTS
Murata 1 to 2.2 1210 100 V X7R GRM32 series
1 to 4.7 50 V
1 1206 100 V GRM31 series
1 to 2.2 50 V
Vishay 1 10 1.8 2220 50 V VJ X7R series
1 to 1.2 100 V
1 to 3.9 2225 50 V
1 to 1.8 100 V
TDK 1 to 2.2 1812 100 V C series C4532
1.5 to 6.8 50 V
1 to 2.2 1210 100 V C series C3225
1 to 3.3 50 V
AVX 1 to 4.7 1210 50 V X7R dielectric series
1 100 V
1 to 4.7 1812 50 V
1 to 2.2 100 V