SLVSD01B September 2015 – May 2019 TPS57140-EP
PRODUCTION DATA.
The TPS57140-EP device is a 42-V, 1.5-A, step-down (buck) regulator with an integrated high-side n-channel MOSFET. To improve performance during line and load transients, the device implements a constant-frequency, current-mode control which reduces output capacitance and simplifies external frequency-compensation design. The wide switching frequency of 100 to 2500 kHz allows for efficiency and size optimization when selecting the output-filter components. Using a resistor to ground on the RT/CLK pin adjusts the switching frequency. The device has an internal phase-locked loop (PLL) on the RT/CLK pin that synchronizes the power-switch turnon to a falling edge of an external system clock.
The TPS57140-EP has a default start-up voltage of approximately 2.5 V. The EN pin has an internal pullup current source that the designer can use to adjust the input-voltage UVLO threshold with two external resistors. In addition, the pullup current provides a default condition. When the EN pin is floating, the device operates. The operating current is 116 μA when not switching and under no load. With the device disabled, the supply current is 1.5 μA.
The integrated 200-mΩ high-side MOSFET allows for high-efficiency power-supply designs capable of delivering 1.5 A of continuous current to a load. The TPS57140-EP reduces the external component count by integrating the boot recharge diode. A capacitor between the BOOT and PH pins supplies the bias voltage for the integrated high-side MOSFET. A UVLO circuit monitors the boot-capacitor voltage and turns the high-side MOSFET off when the boot voltage falls below a preset threshold. The TPS57140-EP can operate at high duty cycles because of the boot UVLO. Stepping down of the output voltage can extend as low as the 0.8-V reference.
The TPS57140-EP has a power-good comparator (PWRGD) which asserts when the regulated output voltage is <92% or >109% of the nominal output voltage. The PWRGD pin is an open-drain output which deasserts when the VSENSE pin voltage is between 94% and 107% of the nominal output voltage, allowing the pin to transition high when a pullup resistor is used.
The TPS57140-EP minimizes excessive output overvoltage (OV) transients by taking advantage of the OV power-good comparator. With the OV comparator activated, the high-side MOSFET turns off and remains masked from turning on until the output voltage is lower than 107%.
Use the SS/TR (slow-start/tracking) pin to minimize inrush currents or provide power-supply sequencing during power up. Couple a small-value capacitor to the pin to adjust the slow-start time. The designer can couple a resistor divider to the pin for critical power-supply sequencing requirements. Discharge of the SS/TR pin occurs before the output powers up. This discharging ensures a repeatable restart after an overtemperature fault, UVLO fault, or a disabled condition.
The TPS57140-EP also discharges the slow-start capacitor during overload conditions with an overload-recovery circuit. The overload-recovery circuit slow-starts the output from the fault voltage to the nominal regulation voltage on removal of a fault condition. A frequency-foldback circuit reduces the switching frequency during start-up and overcurrent fault conditions to help control the inductor current.