SLVS273A February   2000  – November 2015 TPS60140 , TPS60141

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout
      2. 9.3.2 Low-Battery Detector (TPS60140 Only)
      3. 9.3.3 Power-Good Detector (TPS60141)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Start-Up Procedure and Shutdown
      2. 9.4.2 Short-Circuit Protection
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Capacitor Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Power Dissipation
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)(2)
MIN MAX UNIT
Supply voltage at IN to GND and PGND −0.3 3.6 V
Voltage at OUT, ENABLE, LBI, LBO, PG, FB to GND and PGND −0.3 5.4 V
Voltage at C1+ to GND −0.3 VOUT + 0.3 V
Voltage at C1– to GND −0.3 VIN + 0.3 V
Voltage at C2+ to GND −0.3 VOUT + 0.3 V
Voltage at C2– to GND −0.3 VIN + 0.3 V
Continuous output current 150 mA
TJ Maximum junction temperature 150 °C
Tstg Storage temperature –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) V(ENABLE), V(LBI), V(LBO), and V(PG) can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these inputs.

8.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VIN Input voltage 1.8 3.6 V
IOmax Continuous output current 100 mA
TJ Operating junction temperature 125 °C

8.4 Thermal Information

THERMAL METRIC(1) TPS60140, TPS60141 UNIT
PWP (HTSSOP)
20 PINS
RθJA Junction-to-ambient thermal resistance 42 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 23 °C/W
RθJB Junction-to-board thermal resistance 20 °C/W
ψJT Junction-to-top characterization parameter 0.6 °C/W
ψJB Junction-to-board characterization parameter 20 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

CIN = 4.7 µF, C1 = C2 = 2.2 µF, COUT = 10 µF(1) at TC = −40°C to 85°C, VIN = 2 V, FB = VOUT and ENABLE = VIN (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(UVLO) Undervoltage lockout threshold TC = 25°C 1.6 1.8 V
IOmax Maximum continuous output current 100 mA
VO Output voltage 1.8 V < VIN < 2 V, VOUT, Start-up = 5 V,
0 < IOUT < IOmax/2, TC = 0°C to 70°C		 4.8 5.2 V
2 V < VIN < 3.6 V, 0 < IOUT < IOmax 4.8 5.2
Ilkg(OUT) Output leakage current VIN= 2.4 V, V(ENABLE) = GND 1 µA
IQ Quiescent current (no-load input current) VIN= 2.4 V 65 90 µA
I(SD) Shutdown current VIN = 2.4 V, V(ENABLE) = GND 0.05 1 µA
f(OSC) Oscillator frequency 210 320 450 kHz
VIL ENABLE input voltage low VIN = 1.8 V 0.3 × VI V
VIH ENABLE input voltage high VIN = 3.6 V 0.7 × VI V
Ilkg(ENABLE) ENABLE input leakage current V(ENABLE) = GND or VIN 0.01 0.1 µA
Output load regulation VIN = 2.4 V, 1 mA < IOUT < IOUTmax,
TC = 25°C		 0.003 %/mA
Output line regulation 2 V < VIN < 3.6 V, VOUT = 5 V:
IOUT = 75 mA, TC = 25°C		 0.08 %/V
I(SC) Short-circuit current limit VIN< 2.4 V, VOUT = 0 V, TC = 25°C 100 mA
V(TRIP,LBI) LBI trip voltage TPS60140 VIN = 1.8 V to 2.2 V,
Hysteresis 0.8% for rising LBI voltage,
TC = 0°C to 70°C		 1.15 1.21 1.27 V
IIN(LBI) LBI input current TPS60140 LBI = 1.3 V 20 100 nA
VOUT(LBO) LBO output voltage low(2) TPS60140 V(LBI) = 0 V, I(LBO,SINK) = 1 mA 0.4 v
Ilkg(LBO) LBO output leakage current TPS60140 V(LBI) = 1.3 V, V(LBO) = 5 V 0.01 0.1 µA
V(TRIP,PG) Power-good trip voltage TPS60141 TC = 0°C to 70°C 0.86 × VO 0.90 × VO 0.94 × VO V
Vhys(PG) Power-good trip voltage hysteresis TPS60141 VOUT ramping down, TC = 0°C to 70°C 0.80%
VOUT(PG) Power-good output voltage low TPS60141 VOUT= 0 V, I(PG,SINK) = 1 mA 0.4 V
Ilkg(PG) Power-good leakage current TPS60141 VOUT = 5 V, V(PG) = 5 V 0.01 0.1 µA
(1) All capacitors are ceramic capacitors of the type X5R or X7R.
(2) During start-up the LBO signal is invalid for the first 500 µs.

8.6 Typical Characteristics

TPS60140 TPS60141 graph_03_slvs273.gif
Figure 1. Quiescent Supply Current vs Input Voltage
TPS60140 TPS60141 graph_11_slvs273.gif
Figure 2. Oscillator Frequency vs Input Voltage