SLVS279D March   2000  – August 2015 TPS61000 , TPS61002 , TPS61005 , TPS61006 , TPS61007

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Available Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Controller Circuit
      2. 9.3.2 Device Enable
      3. 9.3.3 Undervoltage Lockout
      4. 9.3.4 Low-Battery Detector Circuit (LBI and LBO)
      5. 9.3.5 Low-EMI Switch
      6. 9.3.6 Adjustable Output Voltage (TPS61000 and TPS61007 Only)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power Save Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Schematic of TPS6100x Evaluation Modules (TPS6100XEVM156)
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the TPS61000 and TPS61007 Adjustable Output Voltage Devices
        2. 10.2.2.2 Programming the Low Battery Comparator Threshold Voltage
        3. 10.2.2.3 Inductor Selection
        4. 10.2.2.4 Capacitor Selection
        5. 10.2.2.5 Rectifier Selection
        6. 10.2.2.6 Compensation of the Control Loop
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|10
Thermal pad, mechanical data (Package|Pins)

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI Input voltage (VBAT, VOUT, COMP, FB, LBO, EN, LBI) –0.3 3.6 V
Input voltage (SW) –0.3 VOUT + 0.7 V
Peak current into SW 1300 mA
Continuous total power dissipation See Thermal Information
TA Operating free-air temperature –40 85 °C
TJ Maximum junction temperature 150 °C
Lead temperature 260 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VBAT Supply voltage 0.8 VO V
VO Output current VBAT = 0.8 V 100 mA
VBAT = 0.8 V 250
Inductor 10 33 µH
Input capacitor 10 µF
Output capacitor 22 µF
TJ Operating junction temperature –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS6100x UNIT
DGS (VSSOP)
10 PINS
RθJA Junction-to-ambient thermal resistance 160.6 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 54.4 °C/W
RθJB Junction-to-board thermal resistance 80.5 °C/W
ψJT Junction-to-top characterization parameter 6.3 °C/W
ψJB Junction-to-board characterization parameter 79.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor andIC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI Input voltage for start up RL = 33 Ω 0.9 V
RL = 3 kΩ, TA = 25°C 0.8
Input voltage once started IO = 100 mA 0.8
VO Programmable output voltage TPS61000, TPS61007 IO = 100 mA 1.5 3.3 V
VO Output voltage TPS61001 1.2 V, IO = 1 mA 1.44 1.5 1.55 V
0.8 V < VI < VO, IO = 100 mA 1.45 1.5 1.55
TPS61002 1.2 V, IO = 1 mA 1,72 1.8 1.86 V
0.8 V < VI < VO, IO = 100 mA 1.74 1.8 1.86
TPS61003 1.2 V, IO = 1 mA 2.40 2.5 2.58 V
0.8 V < VI < VO, IO = 100 mA 2.42 2.5 2.58
1.6 V < VI < VO, IO = 200 mA 2.42 2.5 2.58
TPS61004 1.2 V, IO = 1 mA 2.68 2.8 2.89 V
0.8 V < VI < VO, IO = 100 mA 2.72 2.8 2.89
1.6 V < VI < VO, IO = 200 mA 2.72 2.8 2.89
TPS61005 1.2 V, IO = 1 mA 2.88 3.0 3.1 V
0.8 V < VI < VO, IO = 100 mA 2.9 3.0 3.1
1.6 V < VI < VO, IO = 200 mA 2.9 3.0 3.1
TPS61006 1.2 V, IO = 1 mA 3.16 3.3 3.4 V
0.8 V < VI < VO, IO = 100 mA 3.2 3.3 3.4
1.6 V < VI < VO, IO = 200 mA 3.2 3.3 3.4
IO Maximum continuous output current VI = 0.8 V 100 mA
VI = 1.8 V 250
I ILIM Switch current limit TPS61001 0.8 V < VI < VO 0.5 A
TPS61002 0.65
TPS61003 0.9
TPS61004 0.95
TPS61005 1
TPS61006 1.1
VFB Feedback voltage TPS61000, TPS61007 468 500 515 mV
f Oscillator frequency 360 500 840 kHz
DMAX Maximum duty cycle 85%
rDS(on) Switch-on resistance VO = 3.3 V 0.18 0.27 Ω
Line regulation (1) VI = 0.8 V to 1.25 V, IO = 50 mA 0.3 %/V
Load regulation fixed output voltage versions (1) VI = 1.2 V, IO = 10 mA to 90 mA 0.25%
IQ Quiescent current drawn from power source ower (current into VBAT and into VOUT) IO = 0 mA,
VEN = VI,
VO = 3.4 V		 VBAT 44 µA
VOUT 6
ISD Shutdown current from power source (current into VBAT and into VOUT) VEN = 0 V 0.2 5 µA
VIL EN low-level input voltage 0.2x VBAT V
VIH EN high-level input voltage 0.8 × VBAT V
EN input current EN = GND or VBAT 0.1 1 µA
VIL LBI low-level input voltage threshold VLBI voltage decreasing 470 500 530 mV
LBI input hysteresis 10
II LBI input current 0.01 0.1 µA
VOL LBO low-level output voltage VLBI = 0 V, VO = 3.3 V, IOL = 50 µA 0.04 0.2 V
LBO output leakage current VLBI = 650 mV, VLBO = 3.3 V 0.01 1 µA
IFB FB input bias current (TPS61000, TPS61007 only) VFB = 500 mV 0.01 0.1 µA
(1) Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal output voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supply voltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change.

7.6 Typical Characteristics

Table 1. Table of Graphs

TITLE
η Efficiency vs Output Current Figure 1, Figure 2
vs Inductor Type Figure 3
vs Input Voltage Figure 4
IO Maximum Output Current vs Input Voltage Figure 5
VO Output Voltage vs Output Current Figure 6
VO TPS61007 Output Voltage vs Output Current Figure 7
IQ No-Load Supply Current vs Input Voltage Figure 8
ISD Shutdown Current vs Input Voltage Figure 9
VI Minimum Start-Up Input Voltage vs Load Current Figure 10
ILIM Switch Current Limit vs Output Voltage Figure 11
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_eff_io_lvs279.gifFigure 1. Efficiency vs Output Currency
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_eff_ind_lvs279.gifFigure 3. Efficiency vs Inductor Type
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_io_vi_lvs279.gifFigure 5. Maximum Output Current vs Input Voltage
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_vo2_io_lvs279.gifFigure 7. TPS61007 Output Voltage vs Output Current
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_isd_vi_lvs279.gifFigure 9. Shutdown Current vs Input Voltage
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_ilim_vo_lvs279.gifFigure 11. TPS61000, TPS61007 Switch Current Limit vs Output Voltage
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_eff2_io_lvs279.gifFigure 2. Efficiency vs Output Currency
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_eff_vi_lvs279.gifFigure 4. Efficiency vs Input Voltage
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_vo_io_lvs279.gifFigure 6. TPS61002/3/6 Output Voltage vs Output Current
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_iq_vi_lvs279.gifFigure 8. No-Load Supply Current vs Input Voltage
TPS61000 TPS61001 TPS61002 TPS61003 TPS61004 TPS61005 TPS61006 TPS61007 tc_vi_io_lvs279.gifFigure 10. Minimum Start-up Input Voltage vs Load Current