SLVSDX7D January   2019  – July 2021 TPS61022

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Enable and Soft Start
      3. 7.3.3 Switching Frequency
      4. 7.3.4 Current Limit Operation
      5. 7.3.5 Pass-Through Operation
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Output Short-to-Ground Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Forced PWM Mode
      2. 7.4.2 Power-Save Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Loop Stability, Feedforward Capacitor Selection
        5. 8.2.2.5 Input Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.4 Loop Stability, Feedforward Capacitor Selection

When the switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the regulation loop may be unstable.

The load transient response is another approach to check the loop stability. During the load transient recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the stability of the converters. Without any ringing, the loop has usually more than 45° of phase margin.

A feedforward capacitor (C3 in the Figure 8-2) in parallel with R1 induces a pair of zero and pole in the loop transfer function. By setting the proper zero frequency, the feedforward capacitor can increase the phase margin to improve the loop stability. For large output capacitance more than 40 μF application, TI recommends a feedforward capacitor to set the zero frequency (fFFZ) to 2 kHz. As for the input voltage lower than 2-V application, TI recommends setting the zero frequency (fFFZ) to 20 kHz when the effective output capacitance is less than 40 μF. The value of the feedforward capacitor can be calculated by Equation 10.

Equation 10. GUID-1CAB94D3-C47A-418F-A723-E28E875A20D2-low.gif

where

  • R1 is the resistor between the VOUT pin and FB pin
  • fFFZ is the zero frequency created by the feedforward capacitor
GUID-D7D6CDE7-76A8-406C-B946-2AE83357DEAE-low.gif Figure 8-2 TPS61022 Circuit With Feedforward Capacitor