The TPS6102x family of devices provide a power supply solution for products powered by either a one-cell, two-cell, or three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-polymer battery. Output currents can go as high as 200 mA while using a single-cell alkaline battery, and discharge it down to 0.9 V. The device can also be used for generating 5 V at 500 mA from a 3.3-V rail or a Li-Ion battery. The boost converter is based on a fixed-frequency, pulse width modulation (PWM) controller using a synchronous rectifier to obtain maximum efficiency. At low load currents the converter enters the power save mode to maintain a high efficiency over a wide-load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. The maximum peak current in the boost switch is limited to a value of 800 mA, 1500 mA, or 1800 mA depending on the version of the device.
The TPS6102x devices keep the output voltage regulated even when the input voltage exceeds the nominal output voltage. The output voltage can be programmed by an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. A low-EMI mode is implemented to reduce ringing and, in effect, lower radiated electromagnetic energy when the converter enters the discontinuous conduction mode. The device is packaged in a 10-pin VSON PowerPAD™ package measuring 3 mm x 3 mm (DRC).
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS6102x | VSON (10) | 3.00 mm x 3.00 mm |
Changes from F Revision (April 2012) to G Revision
TA | OUTPUT VOLTAGE DC-DC(1) | NOMINAL SWITCH CURRENT LIMIT | PART NUMBER(2) |
---|---|---|---|
–40°C to 85°C | Adjustable | 1500 mA | TPS61020DRC |
Adjustable | 800 mA | TPS61028DRC | |
Adjustable | 1800 mA | TPS61029DRC | |
3.0 V | 1500 mA | TPS61024DRC | |
3.3 V | 1500 mA | TPS61025DRC | |
5 V | 1800 mA | TPS61026DRC | |
5 V | 1500 mA | TPS61027DRC |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
EN | 1 | I | Enable input. (1/VBAT enabled, 0/GND disabled) |
FB | 3 | I | Voltage feedback of adjustable versions |
GND | 5 | Control / logic ground | |
LBI | 7 | I | Low battery comparator input (comparator enabled with EN), may not be left floating, should be connected to GND or VBAT if comparator is not used |
LBO | 4 | O | Low battery comparator output (open drain) |
PS | 8 | I | Enable/disable power save mode (1/VBAT disabled, 0/GND enabled) |
SW | 9 | I | Boost and rectifying switch input |
PGND | 10 | Power ground | |
VBAT | 6 | I | Supply voltage |
VOUT | 2 | O | Boost converter output |
PowerPAD™ | — | — | Must be soldered to achieve appropriate power dissipation. Should be connected to PGND. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage on SW, VOUT, LBO, VBAT, PS, EN, FB, LBI | –0.3 | 7 | V | |
TJ | Operating virtual junction temperature | –40 | 150 | °C |
Tstg | Storage temperature | –65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2000 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±750 |
MIN | NOM | MAX | UNIT | |
---|---|---|---|---|
Supply voltage at VBAT, VI (TPS61020, TPS61024, TPS61025, TPS61028) | 0.9 | 6.5 | V | |
Supply voltage at VBAT, VI (TPS61026, TPS61029) | 0.9 | 5.5 | V | |
Operating virtual junction temperature range, TJ | –40 | 125 | °C |
THERMAL METRIC(1) | TPS6102x | UNIT | |
---|---|---|---|
SON | |||
10 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 47.2 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 67.5 | |
RθJB | Junction-to-board thermal resistance | 21.6 | |
ψJT | Junction-to-top characterization parameter | 1.7 | |
ψJB | Junction-to-board characterization parameter | 21.8 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 3.6 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
DC-DC STAGE | |||||||
VI | Minimum input voltage for start-up | RL = 120 Ω | 0.9 | 1.2 | V | ||
Input voltage range, after start-up (TPS61020, TPS61024, TPS61025, TPS61027, TPS61028) | 0.9 | 6.5 | V | ||||
Input voltage range, after start-up (TPS61026, TPS61029) | 0.9 | 5.5 | V | ||||
VO | TPS61020, TPS61028 and TPS61029 output voltage range | 1.8 | 5.5 | V | |||
VFB | TPS61020, TPS61028 and TPS61029 feedback voltage | 490 | 500 | 510 | mV | ||
f | Oscillator frequency | 480 | 600 | 720 | kHz | ||
ISW | Switch current limit (TPS61020, TPS61024, TPS61025, TPS61027) | VOUT= 3.3 V | 1200 | 1500 | 1800 | mA | |
ISW | Switch current limit (TPS61028) | VOUT= 3.3 V | 800 | mA | |||
ISW | Switch current limit (TPS61026, TPS61029) | VOUT= 3.3 V | 1500 | 1800 | 2100 | mA | |
Start-up current limit | 0.4 x ISW | mA | |||||
SWN switch on resistance | VOUT= 3.3 V | 260 | mΩ | ||||
SWP switch on resistance | VOUT= 3.3 V | 290 | mΩ | ||||
Total accuracy (including line and load regulation) | ±3% | ||||||
Line regulation | 0.6% | ||||||
Load regulation | 0.6% | ||||||
Quiescent current | VBAT | IO = 0 mA, VEN = VBAT = 1.2 V, VOUT = 3.3 V, TA = 25°C |
1 | 3 | µA | ||
VOUT | 25 | 45 | µA | ||||
Shutdown current | VEN = 0 V, VBAT = 1.2 V, TA = 25°C |
0.1 | 1 | µA | |||
CONTROL STAGE | |||||||
VUVLO | Under voltage lockout threshold | VLBI voltage decreasing | 0.8 | V | |||
VIL | LBI voltage threshold | VLBI voltage decreasing | 490 | 500 | 510 | mV | |
LBI input hysteresis | 10 | mV | |||||
LBI input current | EN = VBAT or GND | 0.01 | 0.1 | µA | |||
VOL | LBO output low voltage | VO = 3.3 V, IOI = 100 µA | 0.04 | 0.4 | V | ||
Vlkg | LBO output leakage current | VLBO = 7 V | 0.01 | 0.1 | µA | ||
VIL | EN, PS input low voltage | 0.2 × VBAT | V | ||||
VIH | EN, PS input high voltage | 0.8 × VBAT | V | ||||
EN, PS input current | Clamped on GND or VBAT | 0.01 | 0.1 | µA | |||
Overtemperature protection | 140 | °C | |||||
Overtemperature hysteresis | 20 | °C |
FIGURE | ||
---|---|---|
Maximum output current | vs Input voltage (TPS61020) | Figure 1 |
Efficiency | vs Output current (TPS61020) | Figure 2 |
vs Output current (TPS61025) | Figure 3 | |
vs Output current (TPS61027) | Figure 4 | |
vs Input voltage (TPS61025) | Figure 5 | |
vs Input voltage (TPS61027) | Figure 6 | |
Output voltage | vs Output current (TPS61025) | Figure 7 |
vs Output current (TPS61027) | Figure 8 | |
No load supply current into VBAT | vs Input voltage | Figure 9 |
No load supply current into VOUT | vs Input voltage | Figure 10 |
TPS6102x is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain maximum efficiency. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So changes in the operating conditions of the converter directly affect the duty cycle. At low load currents, the converter enters Power Save Mode to ensure high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency.
The controller circuit of the device is based on a fixed frequency multiple feed forward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier, only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and the inductor. An internal temperature sensor prevents the device from getting overheated in case of excessive power dissipation.
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and allows current flowing from the battery to the output. This device however uses a special circuit which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of the converter. No additional components have to be added to the design to make sure that the battery is disconnected from the output of the converter.
In general, a boost converter only regulates output voltages which are higher than the input voltage. This device operates differently. For example, it is able to regulate 3.0 V at the output with two fresh alkaline cells at the input having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a down conversion mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter changes to the conversion mode. In this mode, the control circuit changes the behavior of the rectifying PMOS. It sets the voltage drop across the PMOS as high as needed to regulate the output voltage. This means the power losses in the converter increase. This has to be taken into account for thermal consideration. The down conversion mode is automatically turned off as soon as the input voltage falls about 50 mV below the output voltage. For proper operation in down conversion mode the output voltage should not be programmed below 50% of the maximum input voltage which can be applied.
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This also means that the output voltage can drop below the input voltage during shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the battery.
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than approximately 0.8 V. When in operation and the battery is being discharged, the device automatically enters the shutdown mode if the voltage on VBAT drops below approximately 0.8 V. This undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter.
When the device enables, the internal startup cycle starts with the first step, the precharge phase. During precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input voltage. The rectifying switch is current limited during that phase. The current limit increases with the output voltage. This circuit also limits the output current under short circuit conditions at the output. Figure 12 shows the typical precharge current vs output voltage for specific input voltages:
After charging the output capacitor to the input voltage, the device starts switching. If the input voltage is below 1.4 V the device works with a fixed duty cycle of 50% until the output voltage reaches 1.4 V. After that the duty cycle is set depending on the input output voltage ratio. Until the output voltage reaches its nominal value, the boost switch current limit is set to 40% of its nominal value to avoid high peak currents at the battery during startup. As soon as the output voltage is reached, the regulator takes control and the switch current limit is set back to 100%.
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is enabled. When the device is disabled, the LBO pin is high-impedance. The switching threshold is 500 mV at LBI. During normal operation, LBO stays at high impedance when the voltage, applied at LBI, is above the threshold. It is active low when the voltage at LBI goes below 500 mV.
The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV, which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the application section for more details about the programming of the LBI threshold. If the low-battery detection circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left unconnected. Do not let the LBI pin float.
The device integrates a circuit that removes the ringing that typically appears on the SW node when the converter enters discontinuous current mode. In this case, the current through the inductor ramps to zero and the rectifying PMOS switch is turned off to prevent a reverse current flowing from the output capacitors back to the battery. Due to the remaining energy that is stored in parasitic components of the semiconductor and the inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage to VBAT and therefore dampens ringing.
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than approximately 0.8 V. When in operation and the battery is being discharged, the device automatically enters the shutdown mode if the voltage on VBAT drops below approximately 0.8 V. This undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter.
The PS pin can be used to select different operation modes. To enable power save, PS must be set low. Power save mode is used to improve efficiency at light load. In power save mode the converter only operates when the output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses and goes again into power save mode once the output voltage exceeds the set threshold voltage. This power save mode can be disabled by setting the PS to VBAT. In down conversion mode, power save mode is always active and the device cannot be forced into fixed frequency operation at light loads.
The output voltage of the TPS61020 DC-DC converter can be adjusted with an external resistor divider. The typical value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 should be lower than 500 kΩ, in order to set the divider current at 1 µA or higher. Because of internal compensation circuitry the value for this resistor should be in the range of 200 kΩ. From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using Equation 1:
If as an example, an output voltage of 3.3 V is needed, a 1.0-MΩ resistor should be chosen for R3. If for any reason the value for R4 is chosen significantly lower than 200 kΩ additional capacitance in parallel to R3 is recommended, in case the device shows unstable regulation of the output voltage. The required capacitance value can be easily calculated using Equation 2:
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The typical current into the LBI pin is 0.01 µA, and the voltage across R2 is equal to the LBI voltage threshold that is generated on-chip, which has a value of 500 mV. The recommended value for R2 is therefore in the range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be calculated using Equation 3.
The output of the low battery supervisor is a simple open-drain output that goes active low if the dedicated battery voltage drops below the programmed threshold voltage on LBI. The output requires a pull up resistor with a recommended value of 1 MΩ. If not used, the LBO pin can be left floating or tied to GND.