SLUS534G September   2002  – March 2015 TPS61030 , TPS61031 , TPS61032

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Controller Circuit
      2. 10.3.2 Synchronous Rectifier
    4. 10.4 Device Functional Modes
      1. 10.4.1 Device Enable
        1. 10.4.1.1 Undervoltage Lockout
      2. 10.4.2 Softstart
      3. 10.4.3 Power Save Mode And Synchronization
      4. 10.4.4 Low Battery Detector Circuit—LBI/LBO
      5. 10.4.5 Low-EMI Switch
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Programming The Output Voltage
        2. 11.2.2.2 Programming The LBI/LBO Threshold Voltage
        3. 11.2.2.3 Inductor Selection
        4. 11.2.2.4 Capacitor Selection
          1. 11.2.2.4.1 Input Capacitor
          2. 11.2.2.4.2 Output Capacitor
            1. 11.2.2.4.2.1 Small Signal Stability
      3. 11.2.3 Application Curves
      4. 11.2.4 System Examples
        1. 11.2.4.1 Power Supply Solution For Maximum Output Power
        2. 11.2.4.2 Power Supply Solution With Auxiliary Positive Output Voltage
        3. 11.2.4.3 Power Supply Solution with Auxiliary Negative Output Voltage
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Considerations
    2. 13.2 Layout Example
    3. 13.3 Thermal Considerations
  14. 14Device and Documentation Support
    1. 14.1 Device Support
      1. 14.1.1 Third-Party Products Disclaimer
    2. 14.2 Related Links
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VI Input voltage on LBI –0.3 3.6 V
Input voltage on SW, VOUT, LBO, VBAT, SYNC, EN, FB –0.3 7 V
TJ Maximum junction temperature –40 150 °C
Tstg Storage temperature range –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

8.2 ESD Ratings

MIN MAX UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) –2000 2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) –1000 1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

MIN NOM MAX UNIT
VI Supply voltage at VBAT 1.8 5.5 V
TA Operating ambient temperature range -40 85 °C
TJ Operating virtual junction temperature range -40 125 °C

8.4 Thermal Information

THERMAL METRIC(1) TPS6103x UNIT
PWP RSA
16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 46.9 35.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 25.8 36.7
RθJB Junction-to-board thermal resistance 19.4 12.9
ψJT Junction-to-top characterization parameter 0.8 0.5
ψJB Junction-to-board characterization parameter 19.3 12.9
RθJC(bot) Junction-to-case (bottom) thermal resistance 2.2 3.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

8.5 Electrical Characteristics

over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC/DC STAGE
VI Input voltage range 1.8 5.5 V
VO TPS61030 output voltage range 1.8 5.5 V
VFB TPS61030 feedback voltage 490 500 510 mV
f Oscillator frequency 500 600 700 kHz
Frequency range for synchronization 500 700 kHz
Switch current limit VOUT= 5 V 3600 4000 4500 mA
Start-up current limit 0.4 x ISW mA
SWN switch on resistance VOUT= 5 V 55 mΩ
SWP switch on resistance VOUT= 5 V 55 mΩ
Total accuracy -3% 3%
Line regulation 0.6%
Load regulation 0.6%
Quiescent current VBAT IO = 0 mA, VEN = VBAT = 1.8 V,
VOUT =5 V		 10 25 µA
VOUT IO = 0 mA, VEN = VBAT = 1.8 V,
VOUT = 5 V		 10 20 µA
Shutdown current VEN= 0 V, VBAT = 2.4 V 0.1 1 µA
CONTROL STAGE
VUVLO Under voltage lockout threshold VLBI voltage decreasing 1.5 V
VIL LBI voltage threshold VLBI voltage decreasing 490 500 510 mV
LBI input hysteresis 10 mV
LBI input current EN = VBAT or GND 0.01 0.1 µA
LBO output low voltage VO = 3.3 V, IOI = 100 µA 0.04 0.4 V
LBO output low current 100 µA
LBO output leakage current VLBO= 7 V 0.01 0.1 µA
VIL EN, SYNC input low voltage 0.2 × VBAT V
VIH EN, SYNC input high voltage 0.8 × VBAT V
EN, SYNC input current Clamped on GND or VBAT 0.01 0.1 µA
Overtemperature protection 140 °C
Overtemperature hysteresis 20 °C

8.6 Typical Characteristics

Table 1. Table Of Graphs

DC/DC CONVERTER FIGURE
Maximum output current vs Input voltage Figure 1,
Figure 2
Efficiency vs Output current (TPS61030) (VO = 2.5 V, VI = 1.8 V, VSYNC = 0 V) Figure 3
vs Output current (TPS61031) (VO = 3.3 V, VI = 1.8 V, 2.4 V, VSYNC = 0 V) Figure 4
vs Output current (TPS61032) (VO = 5.0 V, VI = 2.4 V, 3.3 V, VSYNC = 0 V) Figure 5
vs Input voltage (TPS61031) (IO = 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) Figure 6
vs Input voltage (TPS61032) (IO = 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) Figure 7
Output voltage vs Output current (TPS61031) (VI = 2.4 V) Figure 8
vs Output current (TPS61032) (VI = 3.3 V) Figure 9
No-load supply current into VBAT vs Input voltage (TPS61032) Figure 10
No-load supply current into VOUT vs Input voltage (TPS61032) Figure 11
Minimum Load Resistance at Startup vs Input voltage (TPS61032) Figure 12
TPS61030 TPS61031 TPS61032 IO_v_VI31_LUS534.gif
Figure 1. TPS61031 Maximum Output Current
vs Input Voltage
TPS61030 TPS61031 TPS61032 IO_v_VI32_LUS534.gif
Figure 2. TPS61032 Maximum Output Current
vs Input Voltage
TPS61030 TPS61031 TPS61032 Eff_v_IO30_LUS534.gif
VO = 2.5 V VI = 1.8 V
Figure 3. TPS61030 Efficiency vs Output Current
TPS61030 TPS61031 TPS61032 Eff_v_IO32_LUS534.gif
VO = 5 V
Figure 5. Tps61032 Efficiency vs Output Current
TPS61030 TPS61031 TPS61032 Eff_v_VI32_LUS534.gif
Figure 7. TPS61032 Efficiency vs Input Voltage
TPS61030 TPS61031 TPS61032 VO_v_IO32_LUS534.gif
VBAT = 3.3 V
Figure 9. TPS61032 Output Voltage
vs Output Current
TPS61030 TPS61031 TPS61032 NLout_v_VI_LUS534.gif
Figure 11. TPS61032 No-Load Supply Current Into Vout
vs Input Voltage
TPS61030 TPS61031 TPS61032 Eff_v_IO31_LUS534.gif
VO = 3.3 V
Figure 4. TPS61031 Efficiency vs Output Current
TPS61030 TPS61031 TPS61032 Eff_v_VI31_LUS534.gif
Figure 6. TPS61031 Efficiency vs Input Voltage
TPS61030 TPS61031 TPS61032 VO_v_IO31_LUS534.gif
VBAT = 2.4 V
Figure 8. TPS61031 Output Voltage vs Output Current
TPS61030 TPS61031 TPS61032 NLbat_v_VI_LUS534.gif
Figure 10. TPS61032 No-Load Supply Current into Vbat
vs input Voltage
TPS61030 TPS61031 TPS61032 Load_v_VI_LUS534.gif
Figure 12. Minimum Load Resistance at Start-Up
vs Input Voltage