SLVSB50C December   2011  – June 2020 TPS61087-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Frequency Select Pin (FREQ)
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Thermal Shutdown
      5. 7.3.5 Overvoltage Prevention
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Application Circuit: 5 V to 15 V (fS = 1.2 MHz)
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Rectifier Diode Selection
          3. 8.2.1.2.3 Setting the Output Voltage
          4. 8.2.1.2.4 Compensation (COMP)
          5. 8.2.1.2.5 Input Capacitor Selection
          6. 8.2.1.2.6 Output Capacitor Selection
      2. 8.2.2 Application Curves
      3. 8.2.3 Other Application Circuit Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) TPS61087-Q1 UNIT
DRC (VSON) WDRC (VSON)
10 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 57 51.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 84.5 81.3 °C/W
RθJB Junction-to-board thermal resistance 31.5 26.2 °C/W
ψJT Junction-to-top characterization parameter 5.9 4.4 °C/W
ψJB Junction-to-board characterization parameter 31.6 26.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 13 7.6 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.