SLVS484C June   2003  – December 2014 TPS61090 , TPS61091 , TPS61092

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Electrical Characteristics
    5. 7.5 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Synchronous Rectifier
      2. 9.3.2 Controller Circuit
      3. 9.3.3 Device Enable
      4. 9.3.4 Undervoltage Lockout
      5. 9.3.5 Softstart
      6. 9.3.6 Power Save Mode and Synchronization
      7. 9.3.7 Low Battery Detector Circuit—LBI/LBO
      8. 9.3.8 Low-EMI Switch
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Application Circuit for Adjustable Output Voltage Option
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Programming the Output Voltage
          2. 10.2.1.2.2 Programming the LBI/LBO Threshold Voltage
          3. 10.2.1.2.3 Inductor Selection
          4. 10.2.1.2.4 Capacitor Selection
            1. 10.2.1.2.4.1 Input Capacitor
            2. 10.2.1.2.4.2 Output Capacitor DC-DC Converter
            3. 10.2.1.2.4.3 Small Signal Stability
        3. 10.2.1.3 Application Curves
      2. 10.2.2 TPS6109x Application Schematic of 5 Vout With Maximum Output Power
      3. 10.2.3 TPS6109x Application Schematic of 5 Vout and Auxiliary 10 Vout With Charge Pump
      4. 10.2.4 TPS6109x Application Schematic of 5 Vout and Auxiliary -5 Vout With Charge Pump
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RSA|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RSA Package
10 Pins
Top View
po_LVS484.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
EN 11 I Enable input. (1/VBAT enabled, 0/GND disabled)
FB 14 I Voltage feedback of adjustable versions
GND 13 I/O Control/logic ground
LBI 9 I Low battery comparator input (comparator enabled with EN)
LBO 12 O Low battery comparator output (open drain)
NC 2 Not connected
PGND 5, 6, 7 I/O Power ground
PowerPAD™ — — Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
SYNC 10 I Enable/disable power save mode (1: VBAT disabled, 0: GND enabled, clock signal for synchronization)
SW 3, 4 I Boost and rectifying switch input
VBAT 8 I Supply voltage
VOUT 1, 15, 16 O DC-DC output