SLVSC26B November   2013  – May 2024 TPS61162A , TPS61163A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
    1.     Pin Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 EasyScale Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Boost Converter
      2. 6.3.2  IFBx Pin Unused
      3. 6.3.3  Enable and Start-up
      4. 6.3.4  Soft Start
      5. 6.3.5  Full-Scale Current Program
      6. 6.3.6  Brightness Control
      7. 6.3.7  Undervoltage Lockout
      8. 6.3.8  Overvoltage Protection
      9. 6.3.9  Overcurrent Protection
      10. 6.3.10 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 One-Wire Digital Interface (EasyScale Interface)
      2. 6.4.2 PWM Control Interface
    5. 6.5 Programming
      1. 6.5.1 EasyScale Programming
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Inductor Selection
        2. 7.2.2.2 Schottky Diode Selection
        3. 7.2.2.3 Compensation Capacitor Selection
        4. 7.2.2.4 Output Capacitor Selection
      3. 7.2.3 Application Curves
      4. 7.2.4 Additional Application Circuits
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Related Links
    3. 8.3 Community Resources
    4. 8.4 Trademarks
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5.1 EasyScale Programming

EasyScale is a simple, but flexible, one-pin interface to configure the current of the dual channels. The interface is based on a master-slave structure, where the master is typically a microcontroller or application processor and the device is the slave. Figure 6-5 and Table 6-1 give an overview of the protocol used by TPS61162A/TPS61163A. A command consists of 24 bits, including an 8-bit device address byte and a 16-bit data byte. All of the 24 bits should be transmitted together each time, and the LSB bit should be transmitted first. The device address byte D7(MSB)~D0(LSB) is fixed to 0x8F. The data byte includes 9 bits D8(MSB)~D0(LSB) for brightness information and an RFA bit. The RFA bit set to "1" indicates the Request for Acknowledge condition. The Acknowledge condition is only applied when the protocol is received correctly. The advantage of EasyScale compared with other one pin interfaces is that its bit detection is in a large extent independent from the bit transmission rate. It can automatically detect bit rates between 1.7kBit/sec and up to 160kBit/sec.

TPS61162A TPS61163A Easyscale Protocol OverviewFigure 6-5 Easyscale Protocol Overview
Table 6-1 Easyscale Bit Description
BYTEBIT NUMBERNAMETRANSMISSION DIRECTIONDESCRIPTION
Device Address Byte (0x8F)23 (MSB)DA7INDA7 = 1, MSB of device address
22DA6DA6 = 0
21DA5DA5 = 0
20DA4DA4 = 0
19DA3DA3 = 1
18DA2DA2 = 1
17DA1DA1 = 1
16DA0DA0 = 1, LSB of device address
Data Byte15Bit 15INNo information. Write 0 to this bit.
14Bit 14No information. Write 0 to this bit.
13Bit 13No information. Write 0 to this bit.
12Bit 12No information. Write 0 to this bit.
11Bit 11No information. Write 0 to this bit.
10RFARequest for acknowledge. If set to 1, device will pull low the data line when it receives the command well. This feature can only be used when the master has an open drain output stage and the data line needs to be pulled high by the master with a pullup resistor; otherwise, acknowledge condition is not allowed and don't set this bit to 1.
9Bit 9No information. Write 0 to this bit.
8D8Data bit 8, MSB of brightness code
7D7Data bit 7
6D6Data bit 6
5D5Data bit 5
4D4Data bit 4
3D3Data bit 3
2D2Data bit 2
1D1Data bit 1
0 (LSB)D0Data bit 0, LSB of brightness code
TPS61162A TPS61163A Easyscale Timing, With RFA = 0Figure 6-6 Easyscale Timing, With RFA = 0
TPS61162A TPS61163A Easyscale Timing, With RFA = 1Figure 6-7 Easyscale Timing, With RFA = 1
TPS61162A TPS61163A Easyscale — Bit CodingFigure 6-8 Easyscale — Bit Coding

The 24-bit command should be transmitted with LSB first and MSB last. Figure 6-6 shows the protocol without acknowledge request (Bit RFA = 0), Figure 6-7 with acknowledge request (Bit RFA = 1). Before the command transmission, a start condition must be applied. For this, the EN pin must be pulled high for at least tstart (2μs) before the bit transmission starts with the falling edge. If the EN pin is already at high level, no start condition is needed. The transmission of each command is closed with an End of Stream condition for at least tEOS (2μs).

The bit detection is based on a Logic Detection scheme, where the criterion is the relation between tLOW and tHIGH (refer to Figure 6-8). It can be simplified to:

Low Bit (Logic 0): tLOW ≥ 2 x tHIGH

High Bit (Logic 1): tHIGH ≥ 2 x tLOW

The bit detection starts with a falling edge on the EN pin and ends with the next falling edge. Depending on the relation between tHIGH and tLOW, the logic 0 or 1 is detected.

The acknowledge condition is only applied if:

  • Acknowledge is requested by setting RFA bit to 1.
  • The transmitted device address matches with the device address of the IC.
  • Total 24 bits are received correctly.

If above conditions are met, after tvalACK delay from the moment when the last falling edge of the protocol is detected, an internal ACKN-MOSFET is turned on to pull the EN pin low for the time tACKN, which is 512μs maximum, then the Acknowledge condition is valid. During the tvalACK delay, the master controller keeps the line low; after the delay, it should release the line by outputting high impedance and then detect the acknowledge condition. If it reads back a logic 0, it means the device has received the command correctly. The EN pin can be used again by the master when the acknowledge condition ends after tACKN time.

The acknowledge condition can only be requested when the master device has an open drain output. For a push-pull output stage, the use of a series resistor in the EN line to limit the current to 500μA is recommended to for such cases as:

  • An accidentally requested acknowledge, or
  • To protect the internal ACKN-MOSFET.