SLVSCN9B December   2014  – June 2020 TPS61175-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Switching Frequency
      2. 7.3.2 Soft Start
      3. 7.3.3 Overcurrent Protection
      4. 7.3.4 Enable and Thermal Shutdown
      5. 7.3.5 Under Voltage Lockout (UVLO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Minimum ON Time and Pulse Skipping
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Determining the Duty Cycle
        2. 8.2.2.2 Selecting the Inductor
        3. 8.2.2.3 Computing the Maximum Output Current
        4. 8.2.2.4 Setting Output Voltage
        5. 8.2.2.5 Setting the Switching Frequency
        6. 8.2.2.6 Setting the Soft Start Time
        7. 8.2.2.7 Selecting the Schottky Diode
        8. 8.2.2.8 Selecting the Input and Output Capacitors
        9. 8.2.2.9 Compensating the Small Signal Control Loop
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.1 Minimum ON Time and Pulse Skipping

Once the PWM switch is turned on, the TPS61175-Q1 has minimum ON pulse width of 60-ns. This sets the limit of the minimum duty cycle of the PWM switch, and it is independent of the set switching frequency. When operating conditions result in the TPS61175-Q1 having a minimum ON pulse width less than 60-ns, the IC enters pulse-skipping mode. In this mode, the device keeps the power switch off for several switching cycles to keep the output voltage from rising above the regulated voltage. This operation typically occurs in light load condition when the PWM operates in discontinuous mode. Pulse skipping increases the output voltage ripple, see Figure 15.

When setting switching frequency higher than 1.2 MHz, TI recommends using an external synchronous clock as switching frequency to ensure pulse-skipping function works at light load. When using the internal switching frequency above 1.2 MHz, the pulse-skipping operation may not function. When the pulse-skipping function does not work at light load, the TPS61175-Q1 will always run in PWM mode with minimum ON pulse width. To keep the output voltage in regulation, a minimum load is required. The minimum load is related to the input voltage, output voltage, switching frequency, external inductor value and the maximum value of the minimum ON pulse width. Use Equation 1 and Equation 2 to calculate the required minimum load at the worst case. The maximum tmin_ON could be estimated to 80 ns. CSW is the total parasite capacitance at the switching node SW pin. It could be estimated to 100 pF.

Equation 1. TPS61175-Q1 eq_1_slvscn9.gif
Equation 2. TPS61175-Q1 eq_2_slvscn9.gif