8.2.2.1 Inductor Selection

The inductor is the most important component in switching power regulator design because it affects power supply steady state operation, transient behavior, and loop stability. The inductor value, DC resistance (DCR), and saturation current are important specifications to be considered for better performance. Although the boost power stage can be designed to operate in discontinuous mode at maximum load, where the inductor current ramps down to zero during each switching cycle, most applications will be more efficient if the power stage operates in continuous conduction mode, where a DC current flows through the inductor. Therefore, the Equation 8 and Equation 9 below are for CCM operation only. The TPS61196-Q1 is designed to work with inductor values between 10 µH and 100 µH, depending on the switching frequency. Running the controller at higher switching frequencies allows the use of smaller and/or lower profile inductors in the 10-µH range. Running the controller at slower switching frequencies requires the use of larger inductors, near 100 µH, to maintain the same inductor current ripple but may improve overall efficiency due to smaller switching losses. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines saturation.

In a boost regulator, the inductor DC current can be calculated with Equation 7.

Equation 7.

where

• V_OUT = boost output voltage
• I_OUT = boost output current
• V_IN = boost input voltage
• η = power conversion efficiency, use 95% for TPS61196-Q1 applications

The inductor current peak-to-peak ripple can be calculated with Equation 8.

Equation 8.

where

• ΔI_L(P-P) = inductor ripple current
• L = inductor value
• f_SW = switching frequency
• V_OUT = boost output voltage
• V_IN = boost input voltage

Therefore, the inductor peak current is calculated with Equation 9.

Equation 9.

Select an inductor, which saturation current is higher than calculated peak current. To calculate the worst-case inductor peak current, use the minimum input voltage, maximum output voltage, and maximum load current.

Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with the switch FET and power diode. Besides the external switch FET, the overall efficiency is also affected by the inductor DCR. Usually the lower DC resistance shows higher efficiency. However, there is a trade-off between DCR and the inductor footprint; furthermore, shielded inductors typically have higher DCR than unshielded ones.

8.2.2.2 Schottky Diode

The TPS61196-Q1 demands a high-speed rectification for optimum efficiency. Ensure that the diode's average and peak current rating exceed the output LED current and inductor peak current. In addition, the diode's reverse breakdown voltage must exceed the application output voltage.

8.2.2.3 Switch MOSFET And Gate Driver Resistor

The TPS61196-Q1 demands a power N-MOSFET (see Q1 in the Figure 22) as a switch. The voltage and current rating of the MOSFET must be higher than the application output voltage and the inductor peak current. The applications benefit from the addition of a resistor (See R19 in the Figure 22) connected between the GDRV pin and the gate of the switch MOSFET. With this resistor, the gate driving current is limited and the EMI performance is improved. A 3-Ω resistor value is recommended. The device exhibits lower efficiency when the resistor value is above 3 Ω due to the more switching loss of the external MOSFET.

8.2.2.4 Current Sense and Current Sense Filtering

R7 determines the correct overcurrent limit protection. To choose the right value of R7, start with the total system power needed P_OUT, and calculate the input current I_IN by Equation 7. Efficiency can be estimated between 90% to 95%. The second step is to calculate the inductor peak current based on the inductor value L using Equation 8 and Equation 9. The maximum R7 can now be calculated as R7(max) = V_ISNS / I_L(P). It is recommended to add 20% or more margins to account for component variations. A small filter placed on the ISNS pin improves performance of the converter (See R6 and C5 in Simplified Schematic). The time constant of this filter should be approximately 100 ns. The range of R6 should be from about 100 Ω to 1 kΩ for best results. The C5 should be located as close as possible to the ISNS pin to provide noise immunity.

8.2.2.5 Output Capacitor

The output capacitor is mainly selected to meet the requirements for output ripple and loop stability of the whole system. This ripple voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by:

Equation 10.

where

• V_RIPPLE is the peak-to-peak output voltage ripple
• D_MAX is the duty cycle of the boost converter.

D_MAX is approximately equal to (V_OUT(MAX) – V_IN(MIN) / V_OUT(MAX)) in applications. Care must be taken when evaluating a capacitor’s derating under DC bias. The DC bias can also significantly reduce capacitance. Ceramic capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave the margin on the voltage rating to ensure adequate capacitance.

The ESR impact on the output ripple must be considered as well if tantalum or aluminum electrolytic capacitors are used. Assuming there is enough capacitance such that the ripple due to the capacitance can be ignored, the ESR needed to limit the V_RIPPLE is: V_RIPPLE(ESR) = I_L(P) × ESR

Ripple current flowing through a capacitor’s ESR causes power dissipation in the capacitor. This power dissipation causes a temperature increase internally to the capacitor. Excessive temperature can seriously shorten the expected life of a capacitor. Capacitors have ripple current ratings that are dependent on ambient temperature and should not be exceeded. Therefore, high ripple current type electrolytic capacitor with small ESR is used in typical application as shown in Simplified Schematic.

In the typical application, the output requires a capacitor in the range of 22 µF to 220 µF. The output capacitor affects the small signal control loop stability of the boost converter. If the output capacitor is below the range, the boost regulator may potentially become unstable.

8.2.2.6 Loop Consideration

The COMP pin on the TPS61196-Q1 is used for external compensation, allowing the loop response to be optimized for each application. The COMP pin is the output of the internal trans-conductance amplifier. The external resistor R8, along with ceramic capacitors C6 and C8 (see in Simplified Schematic), are connected to the COMP pin to provide poles and zero. The poles and zero, along with the inherent pole and zero in a peak current mode control boost converter, determine the closed loop frequency response. This is important to converter stability and transient response.

The first step is to calculate the pole and the right half plane zero of the peak current mode boost converter by Equation 11 and Equation 12.

Equation 11.

Equation 12.

To make the loop stable, the loop must have sufficient phase margin at the crossover frequency where the loop gain is 1. To avoid the effect of the right half plane zero on the loop stability, choose the crossover frequency less than 1/5 of the ƒ_ZRHP. Then calculate the compensation components by Equation 13 and Equation 14.

Equation 13.

where

• V_OVPTH = 3.02 V which is the internal reference for the output overvoltage-protection setting voltage.
• Gm_EA is the trans-conductance of the error amplifier. Its typical value is 120 μS.
• ƒ_CO is the crossover frequency, which normally is less than 1/5 of the ƒ_ZRHP

Equation 14.

where

• ƒ_P is the pole’s frequency of the power stage calculated by Equation 11

If the output cap is the electrolytic capacitor, which may have large ESR, a capacitor is required to cancel the zero of the output capacitor. Equation 15 calculates the value of this capacitor.

Equation 15.